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Searched refs:pptable (Results 1 – 24 of 24) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega20_processpptables.c67 static void dump_pptable(PPTable_t *pptable)
71 pr_info("Version = 0x%08x\n", pptable->Version);
73 pr_info("FeaturesToRun[0] = 0x%08x\n", pptable->FeaturesToRun[0]);
74 pr_info("FeaturesToRun[1] = 0x%08x\n", pptable->FeaturesToRun[1]);
76 pr_info("SocketPowerLimitAc0 = %d\n", pptable->SocketPowerLimitAc0);
77 pr_info("SocketPowerLimitAc0Tau = %d\n", pptable->SocketPowerLimitAc0Tau);
78 pr_info("SocketPowerLimitAc1 = %d\n", pptable->SocketPowerLimitAc1);
79 pr_info("SocketPowerLimitAc1Tau = %d\n", pptable->SocketPowerLimitAc1Tau);
80 pr_info("SocketPowerLimitAc2 = %d\n", pptable->SocketPowerLimitAc2);
81 pr_info("SocketPowerLimitAc2Tau = %d\n", pptable->SocketPowerLimitAc2Tau);
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H A Dprocess_pptables_v1_0.c209 (struct phm_ppt_v1_information *)(hwmgr->pptable); in get_platform_power_management_table()
252 …t phm_ppt_v1_information *pp_table_information = (struct phm_ppt_v1_information *)(hwmgr->pptable); in init_dpm_2_parameters()
500 (struct phm_ppt_v1_information *)(hwmgr->pptable); in get_pcie_table()
738 (struct phm_ppt_v1_information *)(hwmgr->pptable); in get_gpio_table()
770 (struct phm_ppt_v1_information *)(hwmgr->pptable); in init_clock_voltage_dependency()
1065 hwmgr->pptable = kzalloc(sizeof(struct phm_ppt_v1_information), GFP_KERNEL); in pp_tables_v1_0_initialize()
1067 PP_ASSERT_WITH_CODE((NULL != hwmgr->pptable), in pp_tables_v1_0_initialize()
1112 (struct phm_ppt_v1_information *)(hwmgr->pptable); in pp_tables_v1_0_uninitialize()
1150 kfree(hwmgr->pptable); in pp_tables_v1_0_uninitialize()
1151 hwmgr->pptable = NULL; in pp_tables_v1_0_uninitialize()
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H A Dvega12_processpptables.c196 (struct phm_ppt_v3_information *)hwmgr->pptable; in init_powerplay_table_information()
271 hwmgr->pptable = kzalloc(sizeof(struct phm_ppt_v3_information), GFP_KERNEL); in vega12_pp_tables_initialize()
272 PP_ASSERT_WITH_CODE((hwmgr->pptable != NULL), in vega12_pp_tables_initialize()
298 (struct phm_ppt_v3_information *)(hwmgr->pptable); in vega12_pp_tables_uninitialize()
315 kfree(hwmgr->pptable); in vega12_pp_tables_uninitialize()
316 hwmgr->pptable = NULL; in vega12_pp_tables_uninitialize()
H A Dvega10_hwmgr.c198 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega10_set_features_platform_caps()
308 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_odn_initial_default_setting()
523 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_get_socclk_for_voltage_evv()
560 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega10_get_evv_voltages()
665 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_patch_voltage_dependency_tables_with_lookup_table()
741 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_complete_dependency_tables()
770 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_set_private_data_based_on_pptable()
1165 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega10_construct_voltage_tables()
1254 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_setup_default_pcie_table()
1302 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_setup_default_dpm_tables()
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H A Dvega10_processpptables.c813 (struct phm_ppt_v2_information *)(hwmgr->pptable); in get_pcie_table()
908 (struct phm_ppt_v2_information *)(hwmgr->pptable); in init_powerplay_extended_tables()
1100 (struct phm_ppt_v2_information *)(hwmgr->pptable); in init_dpm_2_parameters()
1187 hwmgr->pptable = kzalloc(sizeof(struct phm_ppt_v2_information), GFP_KERNEL); in vega10_pp_tables_initialize()
1189 PP_ASSERT_WITH_CODE((hwmgr->pptable != NULL), in vega10_pp_tables_initialize()
1234 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_pp_tables_uninitialize()
1272 kfree(hwmgr->pptable); in vega10_pp_tables_uninitialize()
1273 hwmgr->pptable = NULL; in vega10_pp_tables_uninitialize()
H A Dsmu7_hwmgr.c258 (struct phm_ppt_v1_information *)hwmgr->pptable; in smu7_construct_voltage_tables()
577 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_setup_default_pcie_table()
809 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_setup_dpm_tables_v1()
875 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_odn_initial_default_setting()
920 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_setup_voltage_range_from_vbios()
948 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_check_dpm_table_updated()
1627 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_init_dpm_defaults()
1793 (struct phm_ppt_v1_information *)hwmgr->pptable; in smu7_get_evv_voltages()
1926 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_patch_clock_voltage_limits_with_vddc_leakage()
1940 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_patch_voltage_dependency_tables_with_lookup_table()
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H A Dsmu_helper.c467 (struct phm_ppt_v1_information *)(hwmgr->pptable); in phm_get_sclk_for_voltage_evv()
497 struct phm_ppt_v1_information *pptable_info = (struct phm_ppt_v1_information *)(hwmgr->pptable); in phm_initializa_dynamic_state_adjustment_rule_settings()
537 (struct phm_ppt_v1_information *)hwmgr->pptable; in phm_apply_dal_min_voltage_request()
H A Dvega12_thermal.c174 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega12_thermal_set_temperature_range()
H A Dvega20_thermal.c244 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_thermal_set_temperature_range()
H A Dvega20_hwmgr.c789 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_init_smc_table()
1042 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_od8_set_feature_capabilities()
1242 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_od8_initialize_default_settings()
2793 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega20_get_dal_power_level()
3360 PPTable_t *pptable = &(data->smc_state_table.pp_table); in vega20_print_clock_levels() local
3459 gen_speed = pptable->PcieGenSpeed[i]; in vega20_print_clock_levels()
3460 lane_width = pptable->PcieLaneCount[i]; in vega20_print_clock_levels()
3473 pptable->LclkFreq[i], in vega20_print_clock_levels()
H A Dvega10_thermal.c367 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_thermal_set_temperature_range()
H A Dvega10_powertune.c1267 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_initialize_power_tune_defaults()
1318 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_enable_power_containment()
H A Dsmu10_hwmgr.c435 struct smu10_voltage_dependency_table **pptable, in smu10_get_clock_voltage_dependency_table() argument
453 *pptable = ptable; in smu10_get_clock_voltage_dependency_table()
H A Dsmu7_powertune.c1124 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_enable_power_containment()
1214 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_power_control_set_level()
H A Dvega12_hwmgr.c820 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega12_init_smc_table()
1800 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega12_get_dal_power_level()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dsienna_cichlid_ppt.c921 PPTable_t *pptable = smu->smu_table.driver_pptable; in sienna_cichlid_is_support_fine_grained_dpm() local
928 dpm_desc = &pptable->DpmDescriptor[clk_index]; in sienna_cichlid_is_support_fine_grained_dpm()
941 PPTable_t *pptable = (PPTable_t *)table_context->driver_pptable; in sienna_cichlid_print_clk_levels() local
1017 pptable->LclkFreq[i], in sienna_cichlid_print_clk_levels()
1220 PPTable_t *pptable = smu->smu_table.driver_pptable; in sienna_cichlid_get_fan_parameters() local
1222 smu->fan_max_rpm = pptable->FanMaximumRpm; in sienna_cichlid_get_fan_parameters()
1542 PPTable_t *pptable = table_context->driver_pptable; in sienna_cichlid_read_sensor() local
1550 *(uint32_t *)data = pptable->FanMaximumRpm; in sienna_cichlid_read_sensor()
1626 PPTable_t *pptable = smu->smu_table.driver_pptable; in sienna_cichlid_get_thermal_temperature_range() local
1633 range->max = pptable->TemperatureLimit[TEMP_EDGE] * in sienna_cichlid_get_thermal_temperature_range()
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H A Darcturus_ppt.c976 PPTable_t *pptable = smu->smu_table.driver_pptable; in arcturus_get_thermal_temperature_range() local
983 range->max = pptable->TedgeLimit * in arcturus_get_thermal_temperature_range()
985 range->edge_emergency_max = (pptable->TedgeLimit + CTF_OFFSET_EDGE) * in arcturus_get_thermal_temperature_range()
987 range->hotspot_crit_max = pptable->ThotspotLimit * in arcturus_get_thermal_temperature_range()
989 range->hotspot_emergency_max = (pptable->ThotspotLimit + CTF_OFFSET_HOTSPOT) * in arcturus_get_thermal_temperature_range()
991 range->mem_crit_max = pptable->TmemLimit * in arcturus_get_thermal_temperature_range()
993 range->mem_emergency_max = (pptable->TmemLimit + CTF_OFFSET_MEM)* in arcturus_get_thermal_temperature_range()
1076 PPTable_t *pptable = table_context->driver_pptable; in arcturus_read_sensor() local
1088 *(uint32_t *)data = pptable->FanMaximumRpm; in arcturus_read_sensor()
1151 PPTable_t *pptable = smu->smu_table.driver_pptable; in arcturus_get_fan_parameters() local
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H A Dnavi10_ppt.c905 PPTable_t *pptable = smu->smu_table.driver_pptable; in navi10_is_support_fine_grained_dpm() local
912 dpm_desc = &pptable->DpmDescriptor[clk_index]; in navi10_is_support_fine_grained_dpm()
945 PPTable_t *pptable = (PPTable_t *)table_context->driver_pptable; in navi10_print_clk_levels() local
1012 pptable->LclkFreq[i], in navi10_print_clk_levels()
1389 PPTable_t *pptable = smu->smu_table.driver_pptable; in navi10_get_fan_parameters() local
1391 smu->fan_max_rpm = pptable->FanMaximumRpm; in navi10_get_fan_parameters()
1712 PPTable_t *pptable = table_context->driver_pptable; in navi10_read_sensor() local
1720 *(uint32_t *)data = pptable->FanMaximumRpm; in navi10_read_sensor()
1796 PPTable_t *pptable = smu->smu_table.driver_pptable; in navi10_get_thermal_temperature_range() local
1803 range->max = pptable->TedgeLimit * in navi10_get_thermal_temperature_range()
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dvegam_smumgr.c336 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_update_uvd_smc_table()
369 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_update_vce_smc_table()
401 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_update_bif_smc_table()
436 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_initialize_power_tune_defaults()
508 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_cac_table()
545 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_ulv_level()
818 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_single_graphic_level()
871 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_all_graphic_levels()
987 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_single_memory_level()
1091 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_mvdd_value()
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H A Dfiji_smumgr.c472 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_initialize_power_tune_defaults()
494 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_bapm_parameters_in_dpm_table()
588 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_tdc_limit()
674 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_bapm_vddc_base_leakage_sidd()
762 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_cac_table()
802 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_ulv_level()
945 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_single_graphic_level()
1007 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_all_graphic_levels()
1167 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_single_memory_level()
1277 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_mvdd_value()
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H A Dpolaris10_smumgr.c432 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_bapm_parameters_in_dpm_table()
491 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_tdc_limit()
571 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_bapm_vddc_base_leakage_sidd()
706 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_cac_table()
740 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_ulv_level()
915 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_single_graphic_level()
984 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_all_graphic_levels()
1077 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_single_memory_level()
1180 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_mvdd_value()
1207 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_smc_acpi_level()
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H A Dtonga_smumgr.c253 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_get_dependency_volt_by_clk()
398 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_cac_tables()
483 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_ulv_level()
624 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_single_graphic_level()
690 struct phm_ppt_v1_information *pptable_info = (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_all_graphic_levels()
967 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_single_memory_level()
1148 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_mvdd_value()
1316 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_smc_uvd_level()
1376 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_smc_vce_level()
1421 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_smc_acp_level()
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/swsmu/
H A Dsmu_cmn.c636 void *pptable = smu->smu_table.driver_pptable; in smu_cmn_write_pptable() local
641 pptable, in smu_cmn_write_pptable()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/inc/
H A Dhwmgr.h770 void *pptable; member