Searched refs:pm_regs (Results 1 – 2 of 2) sorted by relevance
127 } pm_regs; variable291 pm_regs.pm07_cntrl[ctr] = CBE_COUNT_ALL_CYCLES; in set_pm_event()299 pm_regs.pm07_cntrl[ctr] = 0; in set_pm_event()315 pm_regs.pm07_cntrl[ctr] = 0; in set_pm_event()316 pm_regs.pm07_cntrl[ctr] |= PM07_CTR_COUNT_CYCLES(count_cycles); in set_pm_event()317 pm_regs.pm07_cntrl[ctr] |= PM07_CTR_POLARITY(polarity); in set_pm_event()318 pm_regs.pm07_cntrl[ctr] |= PM07_CTR_INPUT_CONTROL(input_control); in set_pm_event()343 pm_regs.pm07_cntrl[ctr] |= PM07_CTR_INPUT_MUX(signal_bit); in set_pm_event()345 pm_regs.pm07_cntrl[ctr] = 0; in set_pm_event()351 pm_regs.debug_bus_control |= in set_pm_event()[all …]
134 struct mvebu_uart_pm_regs pm_regs; member781 mvuart->pm_regs.rbr = readl(port->membase + UART_RBR(port)); in mvebu_uart_suspend()782 mvuart->pm_regs.tsh = readl(port->membase + UART_TSH(port)); in mvebu_uart_suspend()783 mvuart->pm_regs.ctrl = readl(port->membase + UART_CTRL(port)); in mvebu_uart_suspend()784 mvuart->pm_regs.intr = readl(port->membase + UART_INTR(port)); in mvebu_uart_suspend()785 mvuart->pm_regs.stat = readl(port->membase + UART_STAT); in mvebu_uart_suspend()786 mvuart->pm_regs.brdv = readl(port->membase + UART_BRDV); in mvebu_uart_suspend()787 mvuart->pm_regs.osamp = readl(port->membase + UART_OSAMP); in mvebu_uart_suspend()799 writel(mvuart->pm_regs.rbr, port->membase + UART_RBR(port)); in mvebu_uart_resume()800 writel(mvuart->pm_regs.tsh, port->membase + UART_TSH(port)); in mvebu_uart_resume()[all …]