Searched refs:phy1_ctrl (Results 1 – 1 of 1) sorted by relevance
| /OK3568_Linux_fs/u-boot/arch/arm/mach-exynos/ |
| H A D | dmc_init_ddr3.c | 39 struct exynos5_phy_control *phy0_ctrl, *phy1_ctrl; in ddr3_mem_ctrl_init() local
44 phy1_ctrl = (struct exynos5_phy_control *)(samsung_get_base_dmc_phy() in ddr3_mem_ctrl_init()
57 writel(val, &phy1_ctrl->phy_con39); in ddr3_mem_ctrl_init()
63 writel(val, &phy1_ctrl->phy_con42); in ddr3_mem_ctrl_init()
66 if (dmc_config_zq(mem, &phy0_ctrl->phy_con16, &phy1_ctrl->phy_con16, in ddr3_mem_ctrl_init()
67 &phy0_ctrl->phy_con17, &phy1_ctrl->phy_con17)) in ddr3_mem_ctrl_init()
72 writel(mem->phy1_pulld_dqs, &phy1_ctrl->phy_con14); in ddr3_mem_ctrl_init()
82 writel(mem->phy1_dqs, &phy1_ctrl->phy_con4); in ddr3_mem_ctrl_init()
85 writel(mem->phy1_dq, &phy1_ctrl->phy_con6); in ddr3_mem_ctrl_init()
88 writel(mem->phy1_tFS, &phy1_ctrl->phy_con10); in ddr3_mem_ctrl_init()
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