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Searched refs:p_regs (Results 1 – 16 of 16) sorted by relevance

/OK3568_Linux_fs/external/mpp/mpp/hal/rkdec/avsd/
H A Dhal_avsd_plus.c41 AvsdPlusRegs_t *p_regs = (AvsdPlusRegs_t *)p_hal->p_regs; in set_defalut_parameters() local
43 p_regs->sw02.dec_out_endian = 1; in set_defalut_parameters()
44 p_regs->sw02.dec_in_endian = 0; in set_defalut_parameters()
45 p_regs->sw02.dec_strendian_e = 1; in set_defalut_parameters()
46 p_regs->sw02.dec_max_burst = 16; in set_defalut_parameters()
47 p_regs->sw02.dec_scmd_dis = 0; in set_defalut_parameters()
49 p_regs->sw02.dec_adv_pre_dis = 0; in set_defalut_parameters()
50 p_regs->sw55.apf_threshold = 8; in set_defalut_parameters()
52 p_regs->sw02.dec_latency = 0; in set_defalut_parameters()
53 p_regs->sw02.dec_data_disc_e = 0; in set_defalut_parameters()
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H A Dhal_avsd_vdpu1.c33 AvsdVdpu1Regs_t *p_regs = (AvsdVdpu1Regs_t *)p_hal->p_regs; in set_defalut_parameters() local
35 p_regs->sw02.dec_out_endian = 1; in set_defalut_parameters()
36 p_regs->sw02.dec_in_endian = 0; in set_defalut_parameters()
37 p_regs->sw02.dec_strendian_e = 1; in set_defalut_parameters()
38 p_regs->sw02.dec_max_burst = 16; in set_defalut_parameters()
39 p_regs->sw02.dec_scmd_dis = 0; in set_defalut_parameters()
41 p_regs->sw02.dec_adv_pre_dis = 0; in set_defalut_parameters()
42 p_regs->sw55.apf_threshold = 8; in set_defalut_parameters()
43 p_regs->sw02.dec_latency = 0; in set_defalut_parameters()
45 p_regs->sw02.dec_data_disc_e = 0; in set_defalut_parameters()
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H A Dhal_avsd_vdpu2.c33 AvsdVdpu2Regs_t *p_regs = (AvsdVdpu2Regs_t *)p_hal->p_regs; in set_defalut_parameters() local
35 p_regs->sw54.dec_out_endian = 1; in set_defalut_parameters()
36 p_regs->sw54.dec_in_endian = 0; in set_defalut_parameters()
37 p_regs->sw54.dec_strendian_e = 1; in set_defalut_parameters()
38 p_regs->sw56.dec_max_burlen = 16; in set_defalut_parameters()
39 p_regs->sw50.dec_ascmd0_dis = 0; in set_defalut_parameters()
41 p_regs->sw50.adv_pref_dis = 0; in set_defalut_parameters()
42 p_regs->sw52.adv_pref_thrd = 8; in set_defalut_parameters()
43 p_regs->sw50.adtion_latency = 0; in set_defalut_parameters()
45 p_regs->sw56.dec_data_discd_en = 0; in set_defalut_parameters()
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H A Dhal_avsd_base.h112 RK_U32 *p_regs; member
/OK3568_Linux_fs/external/mpp/mpp/hal/vpu/m2vd/
H A Dhal_m2vd_vdpu1.c116 M2vdVdpu1Reg_t *p_regs = (M2vdVdpu1Reg_t *)ctx->regs; in hal_m2vd_vdpu1_init_hwcfg() local
118 memset(p_regs, 0, sizeof(M2vdVdpu1Reg_t)); in hal_m2vd_vdpu1_init_hwcfg()
119 p_regs->sw02.dec_axi_rn_id = 0; in hal_m2vd_vdpu1_init_hwcfg()
120 p_regs->sw02.dec_timeout_e = 1; in hal_m2vd_vdpu1_init_hwcfg()
121 p_regs->sw02.dec_strswap32_e = 1; in hal_m2vd_vdpu1_init_hwcfg()
122 p_regs->sw02.dec_strendian_e = 1; in hal_m2vd_vdpu1_init_hwcfg()
123 p_regs->sw02.dec_inswap32_e = 1; in hal_m2vd_vdpu1_init_hwcfg()
124 p_regs->sw02.dec_outswap32_e = 1; in hal_m2vd_vdpu1_init_hwcfg()
126 p_regs->sw02.dec_clk_gate_e = 1; in hal_m2vd_vdpu1_init_hwcfg()
127 p_regs->sw02.dec_in_endian = 1; in hal_m2vd_vdpu1_init_hwcfg()
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H A Dhal_m2vd_vdpu2.c156 M2vdVdpu2Reg *p_regs = (M2vdVdpu2Reg *)ctx->regs; in hal_m2vd_vdpu2_init_hwcfg() local
158 memset(p_regs, 0, sizeof(M2vdVdpu2Reg)); in hal_m2vd_vdpu2_init_hwcfg()
160 p_regs->sw56.dec_axi_rn_id = 0; in hal_m2vd_vdpu2_init_hwcfg()
161 p_regs->sw57.dec_timeout_e = 1; in hal_m2vd_vdpu2_init_hwcfg()
162 p_regs->sw54.dec_strswap32_e = 1; //change in hal_m2vd_vdpu2_init_hwcfg()
163 p_regs->sw54.dec_strendian_e = DEC_LITTLE_ENDIAN; in hal_m2vd_vdpu2_init_hwcfg()
164 p_regs->sw54.dec_inswap32_e = 1; //change in hal_m2vd_vdpu2_init_hwcfg()
165 p_regs->sw54.dec_outswap32_e = 1; //change in hal_m2vd_vdpu2_init_hwcfg()
168 p_regs->sw57.dec_clk_gate_e = 1; //change in hal_m2vd_vdpu2_init_hwcfg()
169 p_regs->sw54.dec_in_endian = DEC_LITTLE_ENDIAN; //change in hal_m2vd_vdpu2_init_hwcfg()
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/OK3568_Linux_fs/external/mpp/mpp/hal/rkdec/h264d/
H A Dhal_h264d_vdpu1.c41 static MPP_RET vdpu1_set_refer_pic_idx(H264dVdpu1Regs_t *p_regs, RK_U32 i, in vdpu1_set_refer_pic_idx() argument
46 p_regs->SwReg30.sw_refer0_nbr = val; in vdpu1_set_refer_pic_idx()
49 p_regs->SwReg30.sw_refer1_nbr = val; in vdpu1_set_refer_pic_idx()
52 p_regs->SwReg31.sw_refer2_nbr = val; in vdpu1_set_refer_pic_idx()
55 p_regs->SwReg31.sw_refer3_nbr = val; in vdpu1_set_refer_pic_idx()
58 p_regs->SwReg32.sw_refer4_nbr = val; in vdpu1_set_refer_pic_idx()
61 p_regs->SwReg32.sw_refer5_nbr = val; in vdpu1_set_refer_pic_idx()
64 p_regs->SwReg33.sw_refer6_nbr = val; in vdpu1_set_refer_pic_idx()
67 p_regs->SwReg33.sw_refer7_nbr = val; in vdpu1_set_refer_pic_idx()
70 p_regs->SwReg34.sw_refer8_nbr = val; in vdpu1_set_refer_pic_idx()
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H A Dhal_h264d_vdpu2.c86 static MPP_RET set_refer_pic_idx(H264dVdpuRegs_t *p_regs, RK_U32 i, RK_U16 val) in set_refer_pic_idx() argument
90 p_regs->sw76.num_ref_idx0 = val; in set_refer_pic_idx()
93 p_regs->sw76.num_ref_idx1 = val; in set_refer_pic_idx()
96 p_regs->sw77.num_ref_idx2 = val; in set_refer_pic_idx()
99 p_regs->sw77.num_ref_idx3 = val; in set_refer_pic_idx()
102 p_regs->sw78.num_ref_idx4 = val; in set_refer_pic_idx()
105 p_regs->sw78.num_ref_idx5 = val; in set_refer_pic_idx()
108 p_regs->sw79.num_ref_idx6 = val; in set_refer_pic_idx()
111 p_regs->sw79.num_ref_idx7 = val; in set_refer_pic_idx()
114 p_regs->sw80.num_ref_idx8 = val; in set_refer_pic_idx()
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H A Dhal_h264d_rkv_reg.c430 static MPP_RET set_registers(H264dHalCtx_t *p_hal, H264dRkvRegs_t *p_regs, HalTaskInfo *task) in set_registers() argument
434 memset(p_regs, 0, sizeof(H264dRkvRegs_t)); in set_registers()
437 p_regs->sw02.dec_mode = 1; //!< h264 in set_registers()
438 if (p_regs->sw02.rlc_mode == 1) { in set_registers()
439 p_regs->sw05.stream_len = 0; in set_registers()
441 p_regs->sw05.stream_len = p_hal->strm_len; in set_registers()
443 if (p_regs->sw02.rps_mode) { // rps_mode == 1 in set_registers()
444 p_regs->sw43.rps_base += 0x8; in set_registers()
446 p_regs->sw03.slice_num_lowbits = 0x7ff; in set_registers()
447 p_regs->sw03.slice_num_highbit = 1; in set_registers()
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H A Dhal_h264d_vdpu382.c1196 Vdpu382H264dRegSet *p_regs = p_hal->fast_mode ? in vdpu382_h264_get_ref_used() local
1202 memcpy(&hw_ref_used, &p_regs->statistic.reg265, sizeof(RK_U32)); in vdpu382_h264_get_ref_used()
1253 Vdpu382H264dRegSet *p_regs = p_hal->fast_mode ? in vdpu382_h264d_wait() local
1266 hw_err = p_regs->irq_status.reg224.dec_error_sta || in vdpu382_h264d_wait()
1267 (!p_regs->irq_status.reg224.dec_rdy_sta) || in vdpu382_h264d_wait()
1268 p_regs->irq_status.reg224.buf_empty_sta || in vdpu382_h264d_wait()
1269 p_regs->irq_status.reg226.strmd_error_status || in vdpu382_h264d_wait()
1270 p_regs->irq_status.reg227.colmv_error_ref_picidx || in vdpu382_h264d_wait()
1271 p_regs->irq_status.reg226.strmd_detect_error_flag; in vdpu382_h264d_wait()
1283 param.regs = (RK_U32 *)p_regs; in vdpu382_h264d_wait()
H A Dhal_h264d_vdpu34x.c1115 Vdpu34xH264dRegSet *p_regs = p_hal->fast_mode ? in vdpu34x_h264d_wait() local
1133 param.regs = (RK_U32 *)p_regs; in vdpu34x_h264d_wait()
1135 if (p_regs->irq_status.reg224.dec_error_sta || in vdpu34x_h264d_wait()
1136 (!p_regs->irq_status.reg224.dec_rdy_sta) || in vdpu34x_h264d_wait()
1137 p_regs->irq_status.reg224.buf_empty_sta || in vdpu34x_h264d_wait()
1138 p_regs->irq_status.reg226.strmd_error_status || in vdpu34x_h264d_wait()
1139 p_regs->irq_status.reg227.colmv_error_ref_picidx || in vdpu34x_h264d_wait()
1140 p_regs->irq_status.reg225.strmd_detect_error_flag) in vdpu34x_h264d_wait()
1147 memset(&p_regs->irq_status.reg224, 0, sizeof(RK_U32)); in vdpu34x_h264d_wait()
/OK3568_Linux_fs/kernel/drivers/staging/emxx_udc/
H A Demxx_udc.c188 p_ep_regs = &udc->p_regs->EP_REGS[num]; in _nbu2ss_get_begin_ram_address()
223 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, data); in _nbu2ss_ep_init()
228 _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, data); in _nbu2ss_ep_init()
251 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data); in _nbu2ss_ep_init()
258 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data); in _nbu2ss_ep_init()
261 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data); in _nbu2ss_ep_init()
264 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data); in _nbu2ss_ep_init()
269 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data); in _nbu2ss_ep_init()
272 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data); in _nbu2ss_ep_init()
275 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data); in _nbu2ss_ep_init()
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H A Demxx_udc.h543 struct fc_regs __iomem *p_regs; member
/OK3568_Linux_fs/external/mpp/mpp/hal/rkdec/avs2d/
H A Dhal_avs2d_vdpu382.c384 static MPP_RET fill_registers(Avs2dHalCtx_t *p_hal, Vdpu382Avs2dRegSet *p_regs, HalTaskInfo *task) in fill_registers() argument
393 Vdpu382RegCommon *common = &p_regs->common; in fill_registers()
431 p_regs->avs2d_param.reg65_cur_top_poc = mpp_frame_get_poc(mframe); in fill_registers()
432 p_regs->avs2d_param.reg66_cur_bot_poc = 0; in fill_registers()
435 p_regs->common_addr.reg130_decout_base = fd; in fill_registers()
437 p_regs->common_addr.reg131_colmv_cur_base = mpp_buffer_get_fd(mv_buf->buf[0]); in fill_registers()
438 …AVS2D_HAL_TRACE("cur frame index %d, fd %d, colmv fd %d", task_dec->output, fd, p_regs->common_add… in fill_registers()
445 RK_U32 *ref_low = (RK_U32 *)&p_regs->avs2d_param.reg99; in fill_registers()
446 RK_U32 *ref_hight = (RK_U32 *)&p_regs->avs2d_param.reg100; in fill_registers()
481 p_regs->avs2d_addr.ref_base[i] = get_frame_fd(p_hal, slot_idx); in fill_registers()
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H A Dhal_avs2d_rkv.c323 static MPP_RET fill_registers(Avs2dHalCtx_t *p_hal, Vdpu34xAvs2dRegSet *p_regs, HalTaskInfo *task) in fill_registers() argument
332 Vdpu34xRegCommon *common = &p_regs->common; in fill_registers()
370 p_regs->avs2d_param.reg65_cur_top_poc = mpp_frame_get_poc(mframe); in fill_registers()
371 p_regs->avs2d_param.reg66_cur_bot_poc = 0; in fill_registers()
374 p_regs->common_addr.reg130_decout_base = fd; in fill_registers()
376 p_regs->common_addr.reg131_colmv_cur_base = mpp_buffer_get_fd(mv_buf->buf[0]); in fill_registers()
377 …AVS2D_HAL_TRACE("cur frame index %d, fd %d, colmv fd %d", task_dec->output, fd, p_regs->common_add… in fill_registers()
384 RK_U32 *ref_low = (RK_U32 *)&p_regs->avs2d_param.reg99; in fill_registers()
385 RK_U32 *ref_hight = (RK_U32 *)&p_regs->avs2d_param.reg100; in fill_registers()
420 p_regs->avs2d_addr.ref_base[i] = get_frame_fd(p_hal, slot_idx); in fill_registers()
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/OK3568_Linux_fs/external/mpp/mpp/hal/vpu/av1d/
H A Dhal_av1d_vdpu.c2274 VdpuAv1dRegSet *p_regs = p_hal->fast_mode ? in vdpu_av1d_wait() local
2291 RK_U32 *p = (RK_U32*)p_regs; in vdpu_av1d_wait()
2296 for (i = 0; i < sizeof(*p_regs) / 4; i++, p++) in vdpu_av1d_wait()
2311 if (!p_regs->swreg1.sw_dec_rdy_int/* decode err */) in vdpu_av1d_wait()