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Searched refs:opp_id (Results 1 – 25 of 25) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_mpc.c143 unsigned int opp_id; in mpc1_is_mpcc_idle() local
147 REG_GET(MPCC_OPP_ID[mpcc_id], MPCC_OPP_ID, &opp_id); in mpc1_is_mpcc_idle()
149 if (top_sel == 0xf && opp_id == 0xf && idle) in mpc1_is_mpcc_idle()
230 REG_SET(MPCC_OPP_ID[mpcc_id], 0, MPCC_OPP_ID, tree->opp_id); in mpc1_insert_plane()
233 REG_SET(MPCC_UPDATE_LOCK_SEL[mpcc_id], 0, MPCC_UPDATE_LOCK_SEL, tree->opp_id); in mpc1_insert_plane()
239 REG_UPDATE(MUX[tree->opp_id], MPC_OUT_MUX, mpcc_id); in mpc1_insert_plane()
295 REG_UPDATE(MUX[tree->opp_id], MPC_OUT_MUX, tree->opp_list->mpcc_id); in mpc1_remove_mpcc()
299 REG_UPDATE(MUX[tree->opp_id], MPC_OUT_MUX, 0xf); in mpc1_remove_mpcc()
368 int opp_id; in mpc1_mpc_init() local
380 for (opp_id = 0; opp_id < MAX_OPP; opp_id++) { in mpc1_mpc_init()
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H A Ddcn10_mpc.h201 void mpc1_cursor_lock(struct mpc *mpc, int opp_id, bool lock);
H A Ddcn10_hw_sequencer.h68 int opp_id);
H A Ddcn10_hw_sequencer_debug.c399 if (s.opp_id != 0xf) { in dcn10_get_mpcc_states()
401 i, s.opp_id, s.dpp_id, s.bot_mpcc_id, in dcn10_get_mpcc_states()
H A Ddcn10_hw_sequencer.c332 if (s.opp_id != 0xf) in dcn10_log_hw_state()
334 i, s.opp_id, s.dpp_id, s.bot_mpcc_id, in dcn10_log_hw_state()
1110 int opp_id = hubp->opp_id; in dcn10_plane_atomic_disable() local
1118 if (opp_id != 0xf && pipe_ctx->stream_res.opp->mpc_tree_params.opp_list == NULL) in dcn10_plane_atomic_disable()
1239 hubp->opp_id = OPP_ID_INVALID; in dcn10_init_pipes()
1242 dc->res_pool->opps[i]->mpc_tree_params.opp_id = dc->res_pool->opps[i]->inst; in dcn10_init_pipes()
2244 int opp_id) in dcn10_program_output_csc() argument
2452 hubp->opp_id = pipe_ctx->stream_res.opp->inst; in dcn10_update_mpcc()
H A Ddcn10_hubp.c66 hubp->opp_id = OPP_ID_INVALID; in hubp1_set_blank()
1297 hubp1->base.opp_id = OPP_ID_INVALID; in dcn10_hubp_construct()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_optc.c205 static void optc3_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt, in optc3_set_odm_combine() argument
230 memory_mask = 0x3 << (opp_id[0] * 2) | 0x3 << (opp_id[1] * 2); in optc3_set_odm_combine()
235 …memory_mask = 0x1 << (opp_id[0] * 2) | 0x1 << (opp_id[1] * 2) | 0x1 << (opp_id[2] * 2) | 0x1 << (o… in optc3_set_odm_combine()
245 OPTC_SEG0_SRC_SEL, opp_id[0], in optc3_set_odm_combine()
246 OPTC_SEG1_SRC_SEL, opp_id[1]); in optc3_set_odm_combine()
250 OPTC_SEG0_SRC_SEL, opp_id[0], in optc3_set_odm_combine()
251 OPTC_SEG1_SRC_SEL, opp_id[1], in optc3_set_odm_combine()
252 OPTC_SEG2_SRC_SEL, opp_id[2], in optc3_set_odm_combine()
253 OPTC_SEG3_SRC_SEL, opp_id[3]); in optc3_set_odm_combine()
H A Ddcn30_mpc.c85 int opp_id, in mpc3_set_out_rate_control() argument
92 REG_UPDATE_2(MUX[opp_id], in mpc3_set_out_rate_control()
97 REG_UPDATE_2(MUX[opp_id], in mpc3_set_out_rate_control()
367 int opp_id, in mpc3_set_denorm() argument
400 REG_UPDATE(DENORM_CONTROL[opp_id], in mpc3_set_denorm()
406 int opp_id, in mpc3_set_denorm_clamp() argument
412 REG_UPDATE_2(DENORM_CONTROL[opp_id], in mpc3_set_denorm_clamp()
415 REG_UPDATE_2(DENORM_CLAMP_G_Y[opp_id], in mpc3_set_denorm_clamp()
418 REG_UPDATE_2(DENORM_CLAMP_B_CB[opp_id], in mpc3_set_denorm_clamp()
1204 int opp_id, in mpc3_set_output_csc() argument
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H A Ddcn30_mpc.h626 int opp_id,
631 int opp_id,
636 int opp_id,
642 int opp_id,
H A Ddcn30_hubp.c528 hubp2->base.opp_id = OPP_ID_INVALID; in hubp3_construct()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_mpc.c76 int opp_id, in mpc2_set_denorm() argument
108 REG_UPDATE(DENORM_CONTROL[opp_id], in mpc2_set_denorm()
114 int opp_id, in mpc2_set_denorm_clamp() argument
119 REG_UPDATE_2(DENORM_CONTROL[opp_id], in mpc2_set_denorm_clamp()
122 REG_UPDATE_2(DENORM_CLAMP_G_Y[opp_id], in mpc2_set_denorm_clamp()
125 REG_UPDATE_2(DENORM_CLAMP_B_CB[opp_id], in mpc2_set_denorm_clamp()
134 int opp_id, in mpc2_set_output_csc() argument
143 REG_SET(CSC_MODE[opp_id], 0, MPC_OCSC_MODE, ocsc_mode); in mpc2_set_output_csc()
171 ocsc_regs.csc_c11_c12 = REG(CSC_C11_C12_A[opp_id]); in mpc2_set_output_csc()
172 ocsc_regs.csc_c33_c34 = REG(CSC_C33_C34_A[opp_id]); in mpc2_set_output_csc()
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H A Ddcn20_optc.c235 void optc2_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt, in optc2_set_odm_combine() argument
258 memory_mask = 0x3 << (opp_id[0] * 2) | 0x3 << (opp_id[1] * 2); in optc2_set_odm_combine()
266 OPTC_SEG0_SRC_SEL, opp_id[0], in optc2_set_odm_combine()
267 OPTC_SEG1_SRC_SEL, opp_id[1]); in optc2_set_odm_combine()
H A Ddcn20_mpc.h284 int opp_id,
289 int opp_id,
294 int opp_id,
300 int opp_id,
H A Ddcn20_hwseq.h51 int opp_id);
H A Ddcn20_optc.h102 void optc2_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt,
H A Ddcn20_hwseq.c775 int opp_id) in dcn20_program_output_csc() argument
787 opp_id, in dcn20_program_output_csc()
793 opp_id, in dcn20_program_output_csc()
1527 hubp->opp_id); in dcn20_update_dchubp_dpp()
2340 hubp->opp_id = pipe_ctx->stream_res.opp->inst; in dcn20_update_mpcc()
2474 res_pool->opps[i]->mpc_tree_params.opp_id = res_pool->opps[i]->inst; in dcn20_fpga_init_hw()
2493 hubp->opp_id = OPP_ID_INVALID; in dcn20_fpga_init_hw()
H A Ddcn20_hubp.c960 hubp->opp_id = OPP_ID_INVALID; in hubp2_set_blank()
1624 hubp2->base.opp_id = OPP_ID_INVALID; in hubp2_construct()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dmpc.h135 int opp_id; /* The OPP instance that owns this MPC tree */ member
149 uint32_t opp_id; member
247 int opp_id,
307 int opp_id,
312 int opp_id,
316 int opp_id,
321 int opp_id,
349 int opp_id,
H A Dhubp.h64 int opp_id; member
H A Dtiming_generator.h285 void (*set_odm_combine)(struct timing_generator *optc, int *opp_id, int opp_cnt,
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/inc/
H A Dhw_sequencer.h155 uint16_t *matrix, int opp_id);
/OK3568_Linux_fs/kernel/Documentation/arm/omap/
H A Domap_pm.rst127 7. `(*pdata->dsp_set_min_opp)(u8 opp_id)`
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_resource.c2055 if (s.opp_id < MAX_OPP) in acquire_resource_from_hw_enabled_state()
2056 pipe_ctx->stream_res.opp->mpc_tree_params.opp_id = s.opp_id; in acquire_resource_from_hw_enabled_state()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_hubp.c857 hubp21->base.opp_id = OPP_ID_INVALID; in hubp21_construct()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_hw_sequencer.c2724 int opp_id) in program_output_csc() argument