Searched refs:offset_spspps (Results 1 – 5 of 5) sorted by relevance
89 RK_U32 offset_spspps[MAX_GEN_REG]; member
144 reg_ctx->offset_spspps[i] = SPSPPS_OFFSET(i); in hal_h265d_vdpu382_init()152 reg_ctx->spspps_offset = reg_ctx->offset_spspps[0]; in hal_h265d_vdpu382_init()662 reg_ctx->spspps_offset = reg_ctx->offset_spspps[i]; in hal_h265d_vdpu382_gen_regs()
144 reg_ctx->offset_spspps[i] = SPSPPS_OFFSET(i); in hal_h265d_vdpu34x_init()152 reg_ctx->spspps_offset = reg_ctx->offset_spspps[0]; in hal_h265d_vdpu34x_init()867 reg_ctx->spspps_offset = reg_ctx->offset_spspps[i]; in hal_h265d_vdpu34x_gen_regs()
142 RK_U32 offset_spspps[VDPU34X_FAST_REG_SET_CNT]; member724 reg_ctx->offset_spspps[i] = VDPU34X_SPSPPS_OFFSET(i); in vdpu34x_h264d_init()731 reg_ctx->spspps_offset = reg_ctx->offset_spspps[0]; in vdpu34x_h264d_init()938 ctx->spspps_offset = ctx->offset_spspps[i]; in vdpu34x_h264d_gen_regs()
146 RK_U32 offset_spspps[VDPU382_FAST_REG_SET_CNT]; member750 reg_ctx->offset_spspps[i] = VDPU382_SPSPPS_OFFSET(i); in vdpu382_h264d_init()757 reg_ctx->spspps_offset = reg_ctx->offset_spspps[0]; in vdpu382_h264d_init()988 ctx->spspps_offset = ctx->offset_spspps[i]; in vdpu382_h264d_gen_regs()