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Searched refs:offset_sclst (Results 1 – 7 of 7) sorted by relevance

/OK3568_Linux_fs/external/mpp/mpp/hal/rkdec/h265d/
H A Dhal_h265d_ctx.h91 RK_U32 offset_sclst[MAX_GEN_REG]; member
H A Dhal_h265d_vdpu382.c146 reg_ctx->offset_sclst[i] = SCALIST_OFFSET(i); in hal_h265d_vdpu382_init()
154 reg_ctx->sclst_offset = reg_ctx->offset_sclst[0]; in hal_h265d_vdpu382_init()
664 reg_ctx->sclst_offset = reg_ctx->offset_sclst[i]; in hal_h265d_vdpu382_gen_regs()
H A Dhal_h265d_vdpu34x.c146 reg_ctx->offset_sclst[i] = SCALIST_OFFSET(i); in hal_h265d_vdpu34x_init()
154 reg_ctx->sclst_offset = reg_ctx->offset_sclst[0]; in hal_h265d_vdpu34x_init()
869 reg_ctx->sclst_offset = reg_ctx->offset_sclst[i]; in hal_h265d_vdpu34x_gen_regs()
/OK3568_Linux_fs/external/mpp/mpp/hal/rkdec/avs2d/
H A Dhal_avs2d_rkv.c56 RK_U32 offset_sclst; member
528 reg_ctx->reg_buf[i].offset_sclst = AVS2_SCALIST_OFFSET(i); in hal_avs2d_rkv_init()
534 reg_ctx->sclst_offset = reg_ctx->reg_buf[0].offset_sclst; in hal_avs2d_rkv_init()
659 reg_ctx->sclst_offset = reg_ctx->reg_buf[i].offset_sclst; in hal_avs2d_rkv_gen_regs()
H A Dhal_avs2d_vdpu382.c56 RK_U32 offset_sclst; member
602 reg_ctx->reg_buf[i].offset_sclst = AVS2_SCALIST_OFFSET(i); in hal_avs2d_vdpu382_init()
608 reg_ctx->sclst_offset = reg_ctx->reg_buf[0].offset_sclst; in hal_avs2d_vdpu382_init()
735 reg_ctx->sclst_offset = reg_ctx->reg_buf[i].offset_sclst; in hal_avs2d_vdpu382_gen_regs()
/OK3568_Linux_fs/external/mpp/mpp/hal/rkdec/h264d/
H A Dhal_h264d_vdpu34x.c144 RK_U32 offset_sclst[VDPU34X_FAST_REG_SET_CNT]; member
726 reg_ctx->offset_sclst[i] = VDPU34X_SCALING_LIST_OFFSET(i); in vdpu34x_h264d_init()
733 reg_ctx->sclst_offset = reg_ctx->offset_sclst[0]; in vdpu34x_h264d_init()
940 ctx->sclst_offset = ctx->offset_sclst[i]; in vdpu34x_h264d_gen_regs()
H A Dhal_h264d_vdpu382.c148 RK_U32 offset_sclst[VDPU382_FAST_REG_SET_CNT]; member
752 reg_ctx->offset_sclst[i] = VDPU382_SCALING_LIST_OFFSET(i); in vdpu382_h264d_init()
759 reg_ctx->sclst_offset = reg_ctx->offset_sclst[0]; in vdpu382_h264d_init()
990 ctx->sclst_offset = ctx->offset_sclst[i]; in vdpu382_h264d_gen_regs()