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Searched refs:od_table (Results 1 – 3 of 3) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dnavi10_ppt.c918 static inline bool navi10_od_feature_is_supported(struct smu_11_0_overdrive_table *od_table, enum S… in navi10_od_feature_is_supported() argument
920 return od_table->cap[cap]; in navi10_od_feature_is_supported()
923 static void navi10_od_setting_get_range(struct smu_11_0_overdrive_table *od_table, in navi10_od_setting_get_range() argument
928 *min = od_table->min[setting]; in navi10_od_setting_get_range()
930 *max = od_table->max[setting]; in navi10_od_setting_get_range()
946 OverDriveTable_t *od_table = in navi10_print_clk_levels() local
1018 if (!smu->od_enabled || !od_table || !od_settings) in navi10_print_clk_levels()
1023 size += sprintf(buf + size, "0: %uMhz\n1: %uMhz\n", od_table->GfxclkFmin, od_table->GfxclkFmax); in navi10_print_clk_levels()
1026 if (!smu->od_enabled || !od_table || !od_settings) in navi10_print_clk_levels()
1031 size += sprintf(buf + size, "1: %uMHz\n", od_table->UclkFmax); in navi10_print_clk_levels()
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega20_hwmgr.c1245 OverDriveTable_t *od_table = &(data->smc_state_table.overdrive_table); in vega20_od8_initialize_default_settings() local
1255 ret = smum_smc_table_manager(hwmgr, (uint8_t *)od_table, TABLE_OVERDRIVE, true); in vega20_od8_initialize_default_settings()
1262 od_table->GfxclkFmin; in vega20_od8_initialize_default_settings()
1264 od_table->GfxclkFmax; in vega20_od8_initialize_default_settings()
1273 od_table->GfxclkFreq1 = od_table->GfxclkFmin; in vega20_od8_initialize_default_settings()
1275 od_table->GfxclkFreq1; in vega20_od8_initialize_default_settings()
1277 od_table->GfxclkFreq3 = od_table->GfxclkFmax; in vega20_od8_initialize_default_settings()
1279 od_table->GfxclkFreq3; in vega20_od8_initialize_default_settings()
1281 od_table->GfxclkFreq2 = (od_table->GfxclkFreq1 + od_table->GfxclkFreq3) / 2; in vega20_od8_initialize_default_settings()
1283 od_table->GfxclkFreq2; in vega20_od8_initialize_default_settings()
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H A Dvega10_hwmgr.c313 struct phm_ppt_v1_clock_voltage_dependency_table *od_table[3]; in vega10_odn_initial_default_setting() local
335 od_table[0] = (struct phm_ppt_v1_clock_voltage_dependency_table *)&odn_table->vdd_dep_on_sclk; in vega10_odn_initial_default_setting()
336 od_table[1] = (struct phm_ppt_v1_clock_voltage_dependency_table *)&odn_table->vdd_dep_on_mclk; in vega10_odn_initial_default_setting()
337 od_table[2] = (struct phm_ppt_v1_clock_voltage_dependency_table *)&odn_table->vdd_dep_on_socclk; in vega10_odn_initial_default_setting()
340 smu_get_voltage_dependency_table_ppt_v1(dep_table[i], od_table[i]); in vega10_odn_initial_default_setting()
347 i = od_table[2]->count - 1; in vega10_odn_initial_default_setting()
348 …od_table[2]->entries[i].clk = hwmgr->platform_descriptor.overdriveLimit.memoryClock > od_table[2]-… in vega10_odn_initial_default_setting()
350 od_table[2]->entries[i].clk; in vega10_odn_initial_default_setting()
351 od_table[2]->entries[i].vddc = odn_table->max_vddc > od_table[2]->entries[i].vddc ? in vega10_odn_initial_default_setting()
353 od_table[2]->entries[i].vddc; in vega10_odn_initial_default_setting()