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Searched refs:mmUVD_UDEC_DBW_UV_ADDR_CONFIG (Results 1 – 2 of 2) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h146 #define mmUVD_UDEC_DBW_UV_ADDR_CONFIG macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v1_0.c349 WREG32_SOC15(UVD, 0, mmUVD_UDEC_DBW_UV_ADDR_CONFIG, in vcn_v1_0_mc_resume_spg_mode()
425 WREG32_SOC15_DPG_MODE_1_0(UVD, 0, mmUVD_UDEC_DBW_UV_ADDR_CONFIG, in vcn_v1_0_mc_resume_dpg_mode()