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Searched refs:mmTA_CNTL_AUX (Results 1 – 15 of 15) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Dmxgpu_vi.c114 mmTA_CNTL_AUX, 0x000f000f, 0x000b0000,
254 mmTA_CNTL_AUX, 0x000f000f, 0x000b0000,
H A Dsi.c83 mmTA_CNTL_AUX, 0x00010000, 0x00010000,
137 mmTA_CNTL_AUX, 0x00010000, 0x00010000,
322 mmTA_CNTL_AUX, 0x00010000, 0x00010000,
358 mmTA_CNTL_AUX, 0x00010000, 0x00010000,
407 mmTA_CNTL_AUX, 0x00010000, 0x00010000,
H A Dgfx_v8_0.c207 mmTA_CNTL_AUX, 0x000f000f, 0x000b0000,
320 mmTA_CNTL_AUX, 0x000f000f, 0x000b0000,
351 mmTA_CNTL_AUX, 0x000f000f, 0x000b0000,
383 mmTA_CNTL_AUX, 0x000f000f, 0x000b0000,
424 mmTA_CNTL_AUX, 0x000f000f, 0x000b0000,
482 mmTA_CNTL_AUX, 0x000f000f, 0x000b0000,
579 mmTA_CNTL_AUX, 0x000f000f, 0x00010000,
684 mmTA_CNTL_AUX, 0x000f000f, 0x000b0000,
H A Dgfx_v9_0.c526 SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfffffeef, 0x010b0000),
569 SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0x000b0000, 0x000b0000),
590 SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfffffeef, 0x010b0000),
645 SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfffffeef, 0x010b0000),
671 SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfffffeef, 0x010b0000),
698 SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfffffeef, 0x10b0000),
H A Dgfx_v10_0.c212 SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfff7ffff, 0x01030000),
1316 SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfff7ffff, 0x01030000),
1362 SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfff7ffff, 0x01030000),
3141 SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfff7ffff, 0x01030000),
3187 SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfff7ffff, 0x01030000),
H A Dgfx_v7_0.c1991 WREG32(mmTA_CNTL_AUX, 0x00010000); in gfx_v7_0_constants_init()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1573 #define mmTA_CNTL_AUX 0x2542 macro
H A Dgfx_7_0_d.h2084 #define mmTA_CNTL_AUX 0x2542 macro
H A Dgfx_7_2_d.h2105 #define mmTA_CNTL_AUX 0x2542 macro
H A Dgfx_8_1_d.h2276 #define mmTA_CNTL_AUX 0x2542 macro
H A Dgfx_8_0_d.h2297 #define mmTA_CNTL_AUX 0x2542 macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h847 #define mmTA_CNTL_AUX macro
H A Dgc_9_2_1_offset.h795 #define mmTA_CNTL_AUX macro
H A Dgc_9_1_offset.h819 #define mmTA_CNTL_AUX macro
H A Dgc_10_1_0_offset.h2747 #define mmTA_CNTL_AUX macro