Home
last modified time | relevance | path

Searched refs:mmSPI_GDBG_WAVE_CNTL (Results 1 – 8 of 8) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v10_3.c676 mmSPI_GDBG_WAVE_CNTL));
682 WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), data);
687 WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), orig_stall_vmid);
716 data = RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL));
718 WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), data);
727 data = RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL));
729 WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), data);
756 data = RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL));
761 WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), data);
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h1420 #define mmSPI_GDBG_WAVE_CNTL 0x31d1 macro
H A Dgfx_7_2_d.h1437 #define mmSPI_GDBG_WAVE_CNTL 0x31d1 macro
H A Dgfx_8_1_d.h1584 #define mmSPI_GDBG_WAVE_CNTL 0x31d1 macro
H A Dgfx_8_0_d.h1616 #define mmSPI_GDBG_WAVE_CNTL 0x31d1 macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2715 #define mmSPI_GDBG_WAVE_CNTL … macro
H A Dgc_9_2_1_offset.h2901 #define mmSPI_GDBG_WAVE_CNTL … macro
H A Dgc_10_3_0_offset.h4844 #define mmSPI_GDBG_WAVE_CNTL … macro