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Searched refs:mmRLC_SRM_INDEX_CNTL_DATA_0 (Results 1 – 9 of 9) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c729 mmRLC_SRM_INDEX_CNTL_DATA_0 - mmRLC_SRM_INDEX_CNTL_DATA_0,
730 mmRLC_SRM_INDEX_CNTL_DATA_1 - mmRLC_SRM_INDEX_CNTL_DATA_0,
731 mmRLC_SRM_INDEX_CNTL_DATA_2 - mmRLC_SRM_INDEX_CNTL_DATA_0,
732 mmRLC_SRM_INDEX_CNTL_DATA_3 - mmRLC_SRM_INDEX_CNTL_DATA_0,
733 mmRLC_SRM_INDEX_CNTL_DATA_4 - mmRLC_SRM_INDEX_CNTL_DATA_0,
734 mmRLC_SRM_INDEX_CNTL_DATA_5 - mmRLC_SRM_INDEX_CNTL_DATA_0,
735 mmRLC_SRM_INDEX_CNTL_DATA_6 - mmRLC_SRM_INDEX_CNTL_DATA_0,
736 mmRLC_SRM_INDEX_CNTL_DATA_7 - mmRLC_SRM_INDEX_CNTL_DATA_0,
2806 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_INDEX_CNTL_DATA_0) in gfx_v9_1_init_rlc_save_restore_list()
H A Dgfx_v8_0.c4012 data = mmRLC_SRM_INDEX_CNTL_DATA_0; in gfx_v8_0_init_save_restore_list()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_d.h1467 #define mmRLC_SRM_INDEX_CNTL_DATA_0 0xec93 macro
H A Dgfx_8_0_d.h1471 #define mmRLC_SRM_INDEX_CNTL_DATA_0 0xec93 macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6175 #define mmRLC_SRM_INDEX_CNTL_DATA_0 … macro
H A Dgc_9_2_1_offset.h6373 #define mmRLC_SRM_INDEX_CNTL_DATA_0 … macro
H A Dgc_9_1_offset.h6397 #define mmRLC_SRM_INDEX_CNTL_DATA_0 … macro
H A Dgc_10_1_0_offset.h9481 #define mmRLC_SRM_INDEX_CNTL_DATA_0 … macro
H A Dgc_10_3_0_offset.h9307 #define mmRLC_SRM_INDEX_CNTL_DATA_0 … macro