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Searched refs:mmMP0_SMN_C2PMSG_101 (Results 1 – 7 of 7) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Dpsp_v3_1.c250 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, psp_ring_reg); in psp_v3_1_ring_create()
257 mmMP0_SMN_C2PMSG_101), 0x80000000, in psp_v3_1_ring_create()
295 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, in psp_v3_1_ring_stop()
306 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_101), in psp_v3_1_ring_stop()
395 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, in psp_v3_1_ring_set_wptr()
H A Dpsp_v12_0.c278 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, in psp_v12_0_ring_create()
285 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_101), in psp_v12_0_ring_create()
322 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, in psp_v12_0_ring_stop()
333 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_101), in psp_v12_0_ring_stop()
413 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, GFX_CTRL_CMD_ID_CONSUME_CMD); in psp_v12_0_ring_set_wptr()
H A Dpsp_v11_0.c441 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, in psp_v11_0_ring_stop()
452 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_101), in psp_v11_0_ring_stop()
484 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, in psp_v11_0_ring_create()
491 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_101), in psp_v11_0_ring_create()
748 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, GFX_CTRL_CMD_ID_CONSUME_CMD); in psp_v11_0_ring_set_wptr()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/mp/
H A Dmp_12_0_0_offset.h166 #define mmMP0_SMN_C2PMSG_101 … macro
H A Dmp_10_0_offset.h166 #define mmMP0_SMN_C2PMSG_101 … macro
H A Dmp_11_0_offset.h166 #define mmMP0_SMN_C2PMSG_101 … macro
H A Dmp_9_0_offset.h166 #define mmMP0_SMN_C2PMSG_101 0x00a5 macro