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Searched refs:mmMC_SEQ_RD_CTL_D1_LP (Results 1 – 7 of 7) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_6_0_d.h931 #define mmMC_SEQ_RD_CTL_D1_LP 0x0AC8 macro
H A Dgmc_7_1_d.h817 #define mmMC_SEQ_RD_CTL_D1_LP 0xac8 macro
H A Dgmc_8_1_d.h921 #define mmMC_SEQ_RD_CTL_D1_LP 0xac8 macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Diceland_smumgr.c2424 *out_reg = mmMC_SEQ_RD_CTL_D1_LP; in iceland_check_s0_mc_reg_index()
2632 …cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ… in iceland_initialize_mc_reg_table()
H A Dci_smumgr.c2496 *out_reg = mmMC_SEQ_RD_CTL_D1_LP; in ci_check_s0_mc_reg_index()
2704 …cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ… in ci_initialize_mc_reg_table()
H A Dtonga_smumgr.c2887 *out_reg = mmMC_SEQ_RD_CTL_D1_LP; in tonga_check_s0_mc_reg_index()
3113 cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1_LP, in tonga_initialize_mc_reg_table()
H A Dfiji_smumgr.c2535 cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1_LP, in fiji_initialize_mc_reg_table()