Searched refs:mmHDMI_INFOFRAME_CONTROL1 (Results 1 – 9 of 9) sorted by relevance
1481 tmp = RREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset); in dce_v6_0_audio_set_avi_infoframe()1485 WREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset, tmp); in dce_v6_0_audio_set_avi_infoframe()1595 tmp = RREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset); in dce_v6_0_audio_hdmi_enable()1597 WREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset, tmp); in dce_v6_0_audio_hdmi_enable()
1652 tmp = RREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset); in dce_v10_0_afmt_setmode()1655 WREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset, tmp); in dce_v10_0_afmt_setmode()1731 tmp = RREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset); in dce_v10_0_afmt_setmode()1733 WREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset, tmp); in dce_v10_0_afmt_setmode()
1694 tmp = RREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset); in dce_v11_0_afmt_setmode()1697 WREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset, tmp); in dce_v11_0_afmt_setmode()1773 tmp = RREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset); in dce_v11_0_afmt_setmode()1775 WREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset, tmp); in dce_v11_0_afmt_setmode()
1596 WREG32(mmHDMI_INFOFRAME_CONTROL1 + offset, in dce_v8_0_afmt_setmode()1662 WREG32_P(mmHDMI_INFOFRAME_CONTROL1 + offset, in dce_v8_0_afmt_setmode()
3865 #define mmHDMI_INFOFRAME_CONTROL1 0x1C12 macro
2943 #define mmHDMI_INFOFRAME_CONTROL1 0x1c12 macro
3722 #define mmHDMI_INFOFRAME_CONTROL1 0x4a0f macro
3527 #define mmHDMI_INFOFRAME_CONTROL1 0x4a0f macro
4758 #define mmHDMI_INFOFRAME_CONTROL1 0x4a0f macro