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Searched refs:mmDP5_DP_DPHY_TRAINING_PATTERN_SEL (Results 1 – 9 of 9) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3389 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL 0x4BD1 macro
H A Ddce_8_0_d.h3881 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL 0x4bd1 macro
H A Ddce_10_0_d.h4513 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL 0x4fb0 macro
H A Ddce_11_0_d.h4493 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL 0x4fb0 macro
H A Ddce_11_2_d.h5725 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL 0x4fb0 macro
H A Ddce_12_0_offset.h11646 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL … macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9929 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL … macro
H A Ddcn_2_0_0_offset.h12616 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL … macro
H A Ddcn_3_0_0_offset.h12414 #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL … macro