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Searched refs:mmDP1_DP_DPHY_TRAINING_PATTERN_SEL (Results 1 – 10 of 10) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3181 #define mmDP1_DP_DPHY_TRAINING_PATTERN_SEL 0x1FD1 macro
H A Ddce_8_0_d.h3877 #define mmDP1_DP_DPHY_TRAINING_PATTERN_SEL 0x1fd1 macro
H A Ddce_10_0_d.h4509 #define mmDP1_DP_DPHY_TRAINING_PATTERN_SEL 0x4bb0 macro
H A Ddce_11_0_d.h4489 #define mmDP1_DP_DPHY_TRAINING_PATTERN_SEL 0x4bb0 macro
H A Ddce_11_2_d.h5721 #define mmDP1_DP_DPHY_TRAINING_PATTERN_SEL 0x4bb0 macro
H A Ddce_12_0_offset.h10510 #define mmDP1_DP_DPHY_TRAINING_PATTERN_SEL … macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h8689 #define mmDP1_DP_DPHY_TRAINING_PATTERN_SEL … macro
H A Ddcn_2_1_0_offset.h10213 #define mmDP1_DP_DPHY_TRAINING_PATTERN_SEL … macro
H A Ddcn_2_0_0_offset.h11304 #define mmDP1_DP_DPHY_TRAINING_PATTERN_SEL … macro
H A Ddcn_3_0_0_offset.h11040 #define mmDP1_DP_DPHY_TRAINING_PATTERN_SEL … macro