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Searched refs:mali_hw_core_register_write (Results 1 – 11 of 11) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/arm/mali400/mali/common/
H A Dmali_gp.c91 …mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_CMD, MALIGP2_REG_VAL_CMD_STOP_BU… in mali_gp_stop_bus()
128 mali_hw_core_register_write(&core->hw_core, reset_wait_target_register, reset_invalid_value); in mali_gp_hard_reset()
130 mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_CMD, MALIGP2_REG_VAL_CMD_RESET); in mali_gp_hard_reset()
133 mali_hw_core_register_write(&core->hw_core, reset_wait_target_register, reset_check_value); in mali_gp_hard_reset()
143 …mali_hw_core_register_write(&core->hw_core, reset_wait_target_register, reset_default_value); /* s… in mali_gp_hard_reset()
145 …mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_CLEAR, MALIGP2_REG_VAL_IRQ_M… in mali_gp_hard_reset()
146 …mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_MASK, MALIGP2_REG_VAL_IRQ_MA… in mali_gp_hard_reset()
156 …mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_MASK, 0); /* disable the IRQ… in mali_gp_reset_async()
157 …mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_CLEAR, MALI400GP_REG_VAL_IRQ… in mali_gp_reset_async()
158 …mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_CMD, MALI400GP_REG_VAL_CMD_SOFT_… in mali_gp_reset_async()
[all …]
H A Dmali_mmu.c165 …mali_hw_core_register_write(&mmu->hw_core, MALI_MMU_REGISTER_COMMAND, MALI_MMU_COMMAND_ENABLE_PAGI… in mali_mmu_enable_paging()
197 …mali_hw_core_register_write(&mmu->hw_core, MALI_MMU_REGISTER_COMMAND, MALI_MMU_COMMAND_ENABLE_STAL… in mali_mmu_enable_stall()
242 …mali_hw_core_register_write(&mmu->hw_core, MALI_MMU_REGISTER_COMMAND, MALI_MMU_COMMAND_DISABLE_STA… in mali_mmu_disable_stall()
262 …mali_hw_core_register_write(&mmu->hw_core, MALI_MMU_REGISTER_COMMAND, MALI_MMU_COMMAND_PAGE_FAULT_… in mali_mmu_page_fault_done()
269 mali_hw_core_register_write(&mmu->hw_core, MALI_MMU_REGISTER_DTE_ADDR, 0xCAFEBABE); in mali_mmu_raw_reset()
271 mali_hw_core_register_write(&mmu->hw_core, MALI_MMU_REGISTER_COMMAND, MALI_MMU_COMMAND_HARD_RESET); in mali_mmu_raw_reset()
300 …mali_hw_core_register_write(&mmu->hw_core, MALI_MMU_REGISTER_INT_MASK, MALI_MMU_INTERRUPT_PAGE_FAU… in mali_mmu_reset()
302 …mali_hw_core_register_write(&mmu->hw_core, MALI_MMU_REGISTER_DTE_ADDR, mali_empty_page_directory_p… in mali_mmu_reset()
315 mali_hw_core_register_write(&mmu->hw_core, MALI_MMU_REGISTER_COMMAND, MALI_MMU_COMMAND_ZAP_CACHE); in mali_mmu_zap_tlb()
328 mali_hw_core_register_write(&mmu->hw_core, MALI_MMU_REGISTER_COMMAND, MALI_MMU_COMMAND_ZAP_CACHE); in mali_mmu_zap_tlb_without_stall()
[all …]
H A Dmali_pp.c131 …mali_hw_core_register_write(&core->hw_core, MALI200_REG_ADDR_MGMT_CTRL_MGMT, MALI200_REG_VAL_CTRL_… in mali_pp_stop_bus()
219 …mali_hw_core_register_write(&core->hw_core, MALI200_REG_ADDR_MGMT_CTRL_MGMT, MALI200_REG_VAL_CTRL_… in mali_pp_hard_reset()
223 mali_hw_core_register_write(&core->hw_core, reset_wait_target_register, reset_check_value); in mali_pp_hard_reset()
233 …mali_hw_core_register_write(&core->hw_core, reset_wait_target_register, 0x00000000); /* set it bac… in mali_pp_hard_reset()
235 …mali_hw_core_register_write(&core->hw_core, MALI200_REG_ADDR_MGMT_INT_CLEAR, MALI200_REG_VAL_IRQ_M… in mali_pp_hard_reset()
236 …mali_hw_core_register_write(&core->hw_core, MALI200_REG_ADDR_MGMT_INT_MASK, MALI200_REG_VAL_IRQ_MA… in mali_pp_hard_reset()
247 …mali_hw_core_register_write(&core->hw_core, MALI200_REG_ADDR_MGMT_INT_MASK, 0); /* disable the IRQ… in mali_pp_reset_async()
248 …mali_hw_core_register_write(&core->hw_core, MALI200_REG_ADDR_MGMT_INT_RAWSTAT, MALI200_REG_VAL_IRQ… in mali_pp_reset_async()
249 …mali_hw_core_register_write(&core->hw_core, MALI200_REG_ADDR_MGMT_CTRL_MGMT, MALI400PP_REG_VAL_CTR… in mali_pp_reset_async()
274 …mali_hw_core_register_write(&core->hw_core, MALI200_REG_ADDR_MGMT_INT_CLEAR, MALI200_REG_VAL_IRQ_M… in mali_pp_reset_wait()
[all …]
H A Dmali_l2_cache.c236 mali_hw_core_register_write(&cache->hw_core, in mali_l2_cache_power_down()
244 mali_hw_core_register_write(&cache->hw_core, in mali_l2_cache_power_down()
289 mali_hw_core_register_write(&cache->hw_core, in mali_l2_cache_core_set_counter_src()
293 mali_hw_core_register_write(&cache->hw_core, in mali_l2_cache_core_set_counter_src()
478 mali_hw_core_register_write(&cache->hw_core, in mali_l2_cache_reset()
484 mali_hw_core_register_write(&cache->hw_core, in mali_l2_cache_reset()
492 mali_hw_core_register_write(&cache->hw_core, in mali_l2_cache_reset()
498 mali_hw_core_register_write(&cache->hw_core, in mali_l2_cache_reset()
531 mali_hw_core_register_write(&cache->hw_core, reg, val); in mali_l2_cache_send_command()
H A Dmali_broadcast.c117 mali_hw_core_register_write(&bcast_unit->hw_core, in mali_bcast_reset()
122 mali_hw_core_register_write(&bcast_unit->hw_core, in mali_bcast_reset()
134 mali_hw_core_register_write(&bcast_unit->hw_core, in mali_bcast_disable()
139 mali_hw_core_register_write(&bcast_unit->hw_core, in mali_bcast_disable()
H A Dmali_pmu.c150 mali_hw_core_register_write(&pmu->hw_core, in mali_pmu_power_down()
164 mali_hw_core_register_write(&pmu->hw_core, in mali_pmu_power_down()
211 mali_hw_core_register_write(&pmu->hw_core, in mali_pmu_power_up()
223 mali_hw_core_register_write(&pmu->hw_core, in mali_pmu_power_up()
266 mali_hw_core_register_write(&pmu->hw_core, in mali_pmu_wait_for_command_finish()
H A Dmali_gp.h97 …mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_MASK, MALIGP2_REG_VAL_IRQ_MA… in mali_gp_mask_all_interrupts()
117 mali_hw_core_register_write(&core->hw_core, in mali_gp_enable_interrupts()
H A Dmali_pp.h116 …mali_hw_core_register_write(&core->hw_core, MALI200_REG_ADDR_MGMT_INT_MASK, MALI200_REG_VAL_IRQ_MA… in mali_pp_mask_all_interrupts()
121 …mali_hw_core_register_write(&core->hw_core, MALI200_REG_ADDR_MGMT_INT_MASK, MALI200_REG_VAL_IRQ_MA… in mali_pp_enable_interrupts()
H A Dmali_mmu.h111 mali_hw_core_register_write(&mmu->hw_core, MALI_MMU_REGISTER_INT_MASK, 0); in mali_mmu_mask_all_interrupts()
H A Dmali_hw_core.h75 MALI_STATIC_INLINE void mali_hw_core_register_write(struct mali_hw_core *core, u32 relative_address… in mali_hw_core_register_write() function
H A Dmali_dlbu.c167 …mali_hw_core_register_write(&dlbu->hw_core, MALI_DLBU_REGISTER_PP_ENABLE_MASK, dlbu->pp_cores_mask… in mali_dlbu_update_mask()