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Searched refs:kbase_reg_read (Results 1 – 25 of 44) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/backend/gpu/
H A Dmali_kbase_gpuprops_backend.c39 registers.gpu_id = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_ID)); in kbase_backend_gpuprops_get()
41 registers.l2_features = kbase_reg_read(kbdev, in kbase_backend_gpuprops_get()
44 registers.tiler_features = kbase_reg_read(kbdev, in kbase_backend_gpuprops_get()
46 registers.mem_features = kbase_reg_read(kbdev, in kbase_backend_gpuprops_get()
48 registers.mmu_features = kbase_reg_read(kbdev, in kbase_backend_gpuprops_get()
50 registers.as_present = kbase_reg_read(kbdev, in kbase_backend_gpuprops_get()
53 registers.js_present = kbase_reg_read(kbdev, in kbase_backend_gpuprops_get()
61 registers.js_features[i] = kbase_reg_read(kbdev, in kbase_backend_gpuprops_get()
68 registers.texture_features[i] = kbase_reg_read(kbdev, in kbase_backend_gpuprops_get()
71 registers.thread_max_threads = kbase_reg_read(kbdev, in kbase_backend_gpuprops_get()
[all …]
H A Dmali_kbase_jm_hw.c202 if (!kbase_reg_read(kbdev, JOB_SLOT_REG(js, JS_COMMAND_NEXT))) in kbasep_jm_wait_js_free()
437 completion_code = kbase_reg_read(kbdev, in kbase_job_done()
454 job_tail = (u64)kbase_reg_read(kbdev, in kbase_job_done()
456 ((u64)kbase_reg_read(kbdev, in kbase_job_done()
459 job_head = (u64)kbase_reg_read(kbdev, in kbase_job_done()
461 ((u64)kbase_reg_read(kbdev, in kbase_job_done()
504 active = kbase_reg_read(kbdev, in kbase_job_done()
549 u32 rawstat = kbase_reg_read(kbdev, in kbase_job_done()
600 done = kbase_reg_read(kbdev, in kbase_job_done()
636 job_in_head_before = ((u64) kbase_reg_read(kbdev, in kbasep_job_slot_soft_or_hard_stop_do_action()
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H A Dmali_kbase_cache_policy_backend.c46 u32 val = kbase_reg_read(kbdev, AMBA_ENABLE); in kbase_cache_set_coherency_mode()
60 kbase_reg_read(kbdev, GPU_CONTROL_REG(AMBA_FEATURES)); in kbase_cache_get_coherency_features()
62 coherency_features = kbase_reg_read( in kbase_cache_get_coherency_features()
72 u32 val = kbase_reg_read(kbdev, AMBA_ENABLE); in kbase_amba_set_memory_cache_support()
85 u32 val = kbase_reg_read(kbdev, AMBA_ENABLE); in kbase_amba_set_invalidate_hint()
H A Dmali_kbase_time.c46 hi1 = kbase_reg_read(kbdev, in kbase_backend_get_gpu_time_norequest()
48 *system_time = kbase_reg_read(kbdev, in kbase_backend_get_gpu_time_norequest()
50 hi2 = kbase_reg_read(kbdev, in kbase_backend_get_gpu_time_norequest()
83 if ((kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_STATUS)) & in timedwait_cycle_count_active()
208 hi1 = kbase_reg_read(kbdev, in kbase_backend_get_cycle_cnt()
210 lo = kbase_reg_read(kbdev, in kbase_backend_get_cycle_cnt()
212 hi2 = kbase_reg_read(kbdev, in kbase_backend_get_cycle_cnt()
H A Dmali_kbase_model_linux.c50 while ((val = kbase_reg_read(kbdev, in serve_job_irq()
78 while ((val = kbase_reg_read(kbdev, in serve_gpu_irq()
98 while ((val = kbase_reg_read(kbdev, in serve_mmu_irq()
156 u32 kbase_reg_read(struct kbase_device *kbdev, u32 offset) in kbase_reg_read() function
167 KBASE_EXPORT_TEST_API(kbase_reg_read);
H A Dmali_kbase_pm_driver.c284 raw = kbase_reg_read(kbdev, in mali_cci_flush_l2()
291 raw = kbase_reg_read(kbdev, in mali_cci_flush_l2()
407 lo = kbase_reg_read(kbdev, GPU_CONTROL_REG(reg)); in kbase_pm_get_state()
408 hi = kbase_reg_read(kbdev, GPU_CONTROL_REG(reg + 4)); in kbase_pm_get_state()
543 val = kbase_reg_read(kbdev, GPU_CONTROL_REG(L2_CONFIG)); in kbase_pm_l2_config_override()
557 val = kbase_reg_read(kbdev, GPU_CONTROL_REG(L2_CONFIG)); in kbase_pm_l2_config_override()
674 u32 val = kbase_reg_read(kbdev, GPU_CONTROL_REG(MCU_CONTROL)); in kbase_pm_enable_mcu_db_notification()
701 kbase_reg_read(kbdev, MMU_AS_REG(MCU_AS_NR, AS_STATUS)) & in wait_mcu_as_inactive()
733 irq_mask = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK)); in kbasep_pm_toggle_power_interrupt()
2338 kbase_reg_read(kbdev,
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H A Dmali_kbase_irq_linux.c59 val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS)); in kbase_job_irq_handler()
102 val = kbase_reg_read(kbdev, MMU_REG(MMU_IRQ_STATUS)); in kbase_mmu_irq_handler()
139 val = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_STATUS)); in kbase_gpu_irq_handler()
270 val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS)); in kbase_job_irq_test_handler()
301 val = kbase_reg_read(kbdev, MMU_REG(MMU_IRQ_STATUS)); in kbase_mmu_irq_test_handler()
357 old_mask_val = kbase_reg_read(kbdev, mask_offset); in kbasep_common_test_interrupt()
/OK3568_Linux_fs/kernel/drivers/gpu/arm/midgard/backend/gpu/
H A Dmali_kbase_gpuprops_backend.c35 regdump->gpu_id = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_ID), NULL); in kbase_backend_gpuprops_get()
37 regdump->l2_features = kbase_reg_read(kbdev, in kbase_backend_gpuprops_get()
39 regdump->suspend_size = kbase_reg_read(kbdev, in kbase_backend_gpuprops_get()
41 regdump->tiler_features = kbase_reg_read(kbdev, in kbase_backend_gpuprops_get()
43 regdump->mem_features = kbase_reg_read(kbdev, in kbase_backend_gpuprops_get()
45 regdump->mmu_features = kbase_reg_read(kbdev, in kbase_backend_gpuprops_get()
47 regdump->as_present = kbase_reg_read(kbdev, in kbase_backend_gpuprops_get()
49 regdump->js_present = kbase_reg_read(kbdev, in kbase_backend_gpuprops_get()
53 regdump->js_features[i] = kbase_reg_read(kbdev, in kbase_backend_gpuprops_get()
57 regdump->texture_features[i] = kbase_reg_read(kbdev, in kbase_backend_gpuprops_get()
[all …]
H A Dmali_kbase_time.c33 hi1 = kbase_reg_read(kbdev, GPU_CONTROL_REG(CYCLE_COUNT_HI), in kbase_backend_get_gpu_time()
35 *cycle_counter = kbase_reg_read(kbdev, in kbase_backend_get_gpu_time()
37 hi2 = kbase_reg_read(kbdev, GPU_CONTROL_REG(CYCLE_COUNT_HI), in kbase_backend_get_gpu_time()
45 hi1 = kbase_reg_read(kbdev, GPU_CONTROL_REG(TIMESTAMP_HI), in kbase_backend_get_gpu_time()
47 *system_time = kbase_reg_read(kbdev, in kbase_backend_get_gpu_time()
49 hi2 = kbase_reg_read(kbdev, GPU_CONTROL_REG(TIMESTAMP_HI), in kbase_backend_get_gpu_time()
87 new_count = kbase_reg_read(kctx->kbdev, in kbase_wait_write_flush()
H A Dmali_kbase_mmu_hw_direct.c69 u32 val = kbase_reg_read(kbdev, MMU_AS_REG(as_nr, AS_STATUS), kctx); in wait_ready()
74 val = kbase_reg_read(kbdev, MMU_AS_REG(as_nr, AS_STATUS), NULL); in wait_ready()
83 kbase_reg_read(kbdev, MMU_AS_REG(as_nr, AS_STATUS), kctx); in wait_ready()
114 protected_debug_mode = kbase_reg_read(kbdev, in validate_protected_page_fault()
145 new_mask = kbase_reg_read(kbdev, MMU_REG(MMU_IRQ_MASK), NULL); in kbase_mmu_interrupt()
176 as->fault_addr = kbase_reg_read(kbdev, in kbase_mmu_interrupt()
181 as->fault_addr |= kbase_reg_read(kbdev, in kbase_mmu_interrupt()
199 as->fault_status = kbase_reg_read(kbdev, in kbase_mmu_interrupt()
210 as->fault_extra_addr = kbase_reg_read(kbdev, in kbase_mmu_interrupt()
214 as->fault_extra_addr |= kbase_reg_read(kbdev, in kbase_mmu_interrupt()
[all …]
H A Dmali_kbase_jm_hw.c50 return !kbase_reg_read(kbdev, JOB_SLOT_REG(js, JS_COMMAND_NEXT), kctx); in kbasep_jm_is_js_free()
271 completion_code = kbase_reg_read(kbdev, in kbase_job_done()
289 job_tail = (u64)kbase_reg_read(kbdev, in kbase_job_done()
292 ((u64)kbase_reg_read(kbdev, in kbase_job_done()
318 active = kbase_reg_read(kbdev, in kbase_job_done()
364 u32 rawstat = kbase_reg_read(kbdev, in kbase_job_done()
414 done = kbase_reg_read(kbdev, in kbase_job_done()
421 kbase_reg_read(kbdev, in kbase_job_done()
496 job_in_head_before = ((u64) kbase_reg_read(kbdev, in kbasep_job_slot_soft_or_hard_stop_do_action()
498 | (((u64) kbase_reg_read(kbdev, in kbasep_job_slot_soft_or_hard_stop_do_action()
[all …]
H A Dmali_kbase_pm_driver.c159 raw = kbase_reg_read(kbdev, in mali_cci_flush_l2()
166 raw = kbase_reg_read(kbdev, in mali_cci_flush_l2()
309 lo = kbase_reg_read(kbdev, GPU_CONTROL_REG(reg), NULL); in kbase_pm_get_state()
310 hi = kbase_reg_read(kbdev, GPU_CONTROL_REG(reg + 4), NULL); in kbase_pm_get_state()
957 kbase_reg_read(kbdev, in kbase_pm_check_transitions_sync()
959 kbase_reg_read(kbdev, in kbase_pm_check_transitions_sync()
963 kbase_reg_read(kbdev, in kbase_pm_check_transitions_sync()
965 kbase_reg_read(kbdev, in kbase_pm_check_transitions_sync()
968 kbase_reg_read(kbdev, in kbase_pm_check_transitions_sync()
970 kbase_reg_read(kbdev, in kbase_pm_check_transitions_sync()
[all …]
H A Dmali_kbase_device_hw.c175 u32 kbase_reg_read(struct kbase_device *kbdev, u16 offset, in kbase_reg_read() function
197 KBASE_EXPORT_TEST_API(kbase_reg_read);
214 status = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_FAULTSTATUS), NULL); in kbase_report_gpu_fault()
215 address = (u64) kbase_reg_read(kbdev, in kbase_report_gpu_fault()
217 address |= kbase_reg_read(kbdev, in kbase_report_gpu_fault()
H A Dmali_kbase_irq_linux.c56 val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS), NULL); in kbase_job_irq_handler()
94 val = kbase_reg_read(kbdev, MMU_REG(MMU_IRQ_STATUS), NULL); in kbase_mmu_irq_handler()
132 val = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_STATUS), NULL); in kbase_gpu_irq_handler()
237 val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS), NULL); in kbase_job_irq_test_handler()
269 val = kbase_reg_read(kbdev, MMU_REG(MMU_IRQ_STATUS), NULL); in kbase_mmu_irq_test_handler()
325 old_mask_val = kbase_reg_read(kbdev, mask_offset, NULL); in kbasep_common_test_interrupt()
H A Dmali_kbase_instr_backend.c49 irq_mask = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK), NULL); in kbasep_instr_hwcnt_cacheclean()
100 irq_mask = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK), NULL); in kbase_instr_hwcnt_enable_internal()
232 irq_mask = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK), NULL); in kbase_instr_hwcnt_disable_internal()
397 irq_mask = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK), in kbase_clean_caches_done()
/OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/csf/
H A Dmali_kbase_csf_reset_gpu.c240 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT)), in kbase_csf_debug_dump_registers()
241 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_STATUS)), in kbase_csf_debug_dump_registers()
242 kbase_reg_read(kbdev, GPU_CONTROL_REG(MCU_STATUS))); in kbase_csf_debug_dump_registers()
244 kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_RAWSTAT)), in kbase_csf_debug_dump_registers()
245 kbase_reg_read(kbdev, MMU_REG(MMU_IRQ_RAWSTAT)), in kbase_csf_debug_dump_registers()
246 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_FAULTSTATUS))); in kbase_csf_debug_dump_registers()
248 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK)), in kbase_csf_debug_dump_registers()
249 kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_MASK)), in kbase_csf_debug_dump_registers()
250 kbase_reg_read(kbdev, MMU_REG(MMU_IRQ_MASK))); in kbase_csf_debug_dump_registers()
252 kbase_reg_read(kbdev, GPU_CONTROL_REG(PWR_OVERRIDE0)), in kbase_csf_debug_dump_registers()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/device/backend/
H A Dmali_kbase_device_hw_jm.c41 u32 status = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_FAULTSTATUS)); in kbase_report_gpu_fault()
42 u64 address = (u64) kbase_reg_read(kbdev, in kbase_report_gpu_fault()
45 address |= kbase_reg_read(kbdev, in kbase_report_gpu_fault()
125 u32 kbase_reg_read(struct kbase_device *kbdev, u32 offset) in kbase_reg_read() function
142 KBASE_EXPORT_TEST_API(kbase_reg_read);
H A Dmali_kbase_device_hw_csf.c45 u64 address = (u64) kbase_reg_read(kbdev, in kbase_report_gpu_fault()
48 address |= kbase_reg_read(kbdev, in kbase_report_gpu_fault()
59 const u32 status = kbase_reg_read(kbdev, in kbase_gpu_fault_interrupt()
227 u32 kbase_reg_read(struct kbase_device *kbdev, u32 offset) in kbase_reg_read() function
251 KBASE_EXPORT_TEST_API(kbase_reg_read);
/OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/mmu/backend/
H A Dmali_kbase_mmu_jm.c291 protected_debug_mode = kbase_reg_read(kbdev, in validate_protected_page_fault()
325 new_mask = kbase_reg_read(kbdev, MMU_REG(MMU_IRQ_MASK)); in kbase_mmu_interrupt()
358 fault->addr = kbase_reg_read(kbdev, MMU_AS_REG(as_no, in kbase_mmu_interrupt()
361 fault->addr |= kbase_reg_read(kbdev, MMU_AS_REG(as_no, in kbase_mmu_interrupt()
375 fault->status = kbase_reg_read(kbdev, MMU_AS_REG(as_no, in kbase_mmu_interrupt()
377 fault->extra_addr = kbase_reg_read(kbdev, in kbase_mmu_interrupt()
380 fault->extra_addr |= kbase_reg_read(kbdev, in kbase_mmu_interrupt()
409 tmp = kbase_reg_read(kbdev, MMU_REG(MMU_IRQ_MASK)); in kbase_mmu_interrupt()
H A Dmali_kbase_mmu_csf.c340 fault->addr = (u64) kbase_reg_read(kbdev, in kbase_mmu_bus_fault_interrupt()
342 fault->addr |= kbase_reg_read(kbdev, in kbase_mmu_bus_fault_interrupt()
371 new_mask = kbase_reg_read(kbdev, MMU_REG(MMU_IRQ_MASK)); in kbase_mmu_interrupt()
383 fault->addr = kbase_reg_read(kbdev, MMU_AS_REG(as_no, in kbase_mmu_interrupt()
386 fault->addr |= kbase_reg_read(kbdev, MMU_AS_REG(as_no, in kbase_mmu_interrupt()
396 fault->status = kbase_reg_read(kbdev, MMU_AS_REG(as_no, in kbase_mmu_interrupt()
399 fault->extra_addr = kbase_reg_read(kbdev, in kbase_mmu_interrupt()
402 fault->extra_addr |= kbase_reg_read(kbdev, in kbase_mmu_interrupt()
435 tmp = kbase_reg_read(kbdev, MMU_REG(MMU_IRQ_MASK)); in kbase_mmu_interrupt()
/OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/device/
H A Dmali_kbase_device_hw.c35 val = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_ID)); in kbase_is_gpu_removed()
52 !(kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT)) & irq_bit)) { in busy_wait_on_irq()
141 u32 irq_mask = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK)); in kbase_gpu_cache_flush_and_busy_wait()
197 irq_mask = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK)); in kbase_gpu_start_cache_clean_nolock()
248 irq_mask = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK)); in kbase_clean_caches_done()
/OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/csf/ipa_control/
H A Dmali_kbase_csf_ipa_control.c83 u32 status = kbase_reg_read(kbdev, IPA_CONTROL_REG(STATUS)); in wait_status()
90 status = kbase_reg_read(kbdev, IPA_CONTROL_REG(STATUS)); in wait_status()
152 value_lo = kbase_reg_read( in read_value_cnt()
154 value_hi = kbase_reg_read( in read_value_cnt()
158 value_lo = kbase_reg_read( in read_value_cnt()
161 value_hi = kbase_reg_read( in read_value_cnt()
166 value_lo = kbase_reg_read( in read_value_cnt()
168 value_hi = kbase_reg_read( in read_value_cnt()
172 value_lo = kbase_reg_read( in read_value_cnt()
175 value_hi = kbase_reg_read( in read_value_cnt()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/mmu/
H A Dmali_kbase_mmu_hw_direct.c184 if (!(kbase_reg_read(kbdev, MMU_AS_REG(as_nr, AS_STATUS)) & in wait_ready()
234 kbase_reg_read(kbdev, GPU_CONTROL_REG(SHADER_PWRTRANS_LO)); in wait_cores_power_trans_complete()
236 kbase_reg_read(kbdev, GPU_CONTROL_REG(SHADER_PWRTRANS_HI)); in wait_cores_power_trans_complete()
489 lock_addr |= (u64)kbase_reg_read(kbdev, MMU_AS_REG(as->number, AS_LOCKADDR_HI)) in kbase_mmu_hw_do_unlock_no_addr()
491 lock_addr |= (u64)kbase_reg_read(kbdev, MMU_AS_REG(as->number, AS_LOCKADDR_LO)); in kbase_mmu_hw_do_unlock_no_addr()
687 irq_mask = kbase_reg_read(kbdev, MMU_REG(MMU_IRQ_MASK)) | in kbase_mmu_hw_enable_fault()
/OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/
H A Dmali_kbase_dummy_job_wa.c68 val = kbase_reg_read(kbdev, offset); in wait_any()
95 val = kbase_reg_read(kbdev, (offset)); in wait()
145 kbase_reg_read(kbdev, JOB_SLOT_REG(slot, JS_STATUS))); in run_job()
175 old_gpu_mask = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK)); in kbase_dummy_job_wa_execute()
176 old_job_mask = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_MASK)); in kbase_dummy_job_wa_execute()
H A Dmali_kbase_pbha_debugfs.c43 u32 reg = kbase_reg_read(kbdev, GPU_CONTROL_REG(SYSC_ALLOC(i))); in int_id_overrides_show()
129 l2_config_val = L2_CONFIG_PBHA_HWU_GET(kbase_reg_read(kbdev, GPU_CONTROL_REG(L2_CONFIG))); in propagate_bits_show()

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