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Searched refs:ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL67_ENABLE (Results 1 – 10 of 10) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h158 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL67_ENABLE 0x377A macro
H A Ddce_8_0_d.h5386 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL67_ENABLE 0x377a macro
H A Ddce_10_0_d.h6620 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL67_ENABLE 0x377a macro
H A Ddce_11_0_d.h6782 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL67_ENABLE 0x377a macro
H A Ddce_11_2_d.h8127 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL67_ENABLE 0x377a macro
H A Ddce_12_0_offset.h17972 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL67_ENABLE … macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h12974 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL67_ENABLE … macro
H A Ddcn_2_1_0_offset.h12734 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL67_ENABLE … macro
H A Ddcn_2_0_0_offset.h16398 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL67_ENABLE … macro
H A Ddcn_3_0_0_offset.h16741 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL67_ENABLE … macro