Searched refs:hw_error_status (Results 1 – 3 of 3) sorted by relevance
100 struct error_status_t hw_error_status; variable723 spin_lock_irqsave(&hw_error_status.access_lock, flags); in gpu_model_glb_request_job_irq()724 hw_error_status.job_irq_status |= JOB_IRQ_GLOBAL_IF; in gpu_model_glb_request_job_irq()725 spin_unlock_irqrestore(&hw_error_status.access_lock, flags); in gpu_model_glb_request_job_irq()734 hw_error_status.errors_mask = 0; in init_register_statuses()735 hw_error_status.gpu_error_irq = 0; in init_register_statuses()736 hw_error_status.gpu_fault_status = 0; in init_register_statuses()737 hw_error_status.job_irq_rawstat = 0; in init_register_statuses()738 hw_error_status.job_irq_status = 0; in init_register_statuses()739 hw_error_status.mmu_irq_rawstat = 0; in init_register_statuses()[all …]
57 hw_error_status.faulty_mmu_as = prandom_u32() % NUM_MMU_AS; in gpu_generate_error()59 hw_error_status.mmu_table_level = in gpu_generate_error()61 hw_error_status.errors_mask = in gpu_generate_error()77 (hw_error_status.errors_mask & in gpu_generate_error()83 (hw_error_status.errors_mask & in gpu_generate_error()89 (hw_error_status.errors_mask & in gpu_generate_error()95 if ((hw_error_status.errors_mask | temp_mask) == in gpu_generate_error()96 hw_error_status.errors_mask) { in gpu_generate_error()100 hw_error_status.errors_mask |= temp_mask; in gpu_generate_error()153 if (walker->params.jc == hw_error_status.current_jc) { in midgard_set_error()[all …]
222 extern struct error_status_t hw_error_status;