Searched refs:hdmi1_phy_pll (Results 1 – 3 of 3) sorted by relevance
130 clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
4170 struct vop2_extend_pll *hdmi0_phy_pll, *hdmi1_phy_pll; in vop2_clk_set_parent_extend() local4175 hdmi1_phy_pll = vop2_extend_clk_find_by_name(vop2, "hdmi1_phy_pll"); in vop2_clk_set_parent_extend()4179 if (hdmi1_phy_pll) in vop2_clk_set_parent_extend()4180 clk_get_rate(hdmi1_phy_pll->clk); in vop2_clk_set_parent_extend()4182 if ((!hdmi0_phy_pll && !hdmi1_phy_pll) || in vop2_clk_set_parent_extend()4184 ((vcstate->output_if & VOP_OUTPUT_IF_HDMI1) && !hdmi1_phy_pll)) in vop2_clk_set_parent_extend()4196 if (hdmi1_phy_pll->vp_mask) { in vop2_clk_set_parent_extend()4198 vop2_extend_clk_get_vp_id(hdmi1_phy_pll)); in vop2_clk_set_parent_extend()4208 hdmi1_phy_pll->vp_mask |= BIT(vp->id); in vop2_clk_set_parent_extend()4212 if (hdmi1_phy_pll) { in vop2_clk_set_parent_extend()[all …]
3679 struct clk hdmi1_phy_pll; in rockchip_vop2_init() local3880 ret = clk_get_by_name(disp_dev, "hdmi1_phy_pll", &hdmi1_phy_pll); in rockchip_vop2_init()3885 hdmi1_phy_pll.dev = NULL; in rockchip_vop2_init()3909 vop2_clk_set_parent(&cstate->dclk, &hdmi1_phy_pll); in rockchip_vop2_init()3919 } else if ((conn_state->output_if & VOP_OUTPUT_IF_HDMI1) && hdmi1_phy_pll.dev) { in rockchip_vop2_init()3920 ret = vop2_clk_set_rate(&hdmi1_phy_pll, dclk_rate * 1000); in rockchip_vop2_init()