Home
last modified time | relevance | path

Searched refs:dppclk_khz (Results 1 – 13 of 13) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
H A Ddcn20_clk_mgr.c108 clk_mgr->dccg->ref_dppclk = clk_mgr->base.clks.dppclk_khz; in dcn20_update_clocks_update_dpp_dto()
110 int dpp_inst, dppclk_khz, prev_dppclk_khz; in dcn20_update_clocks_update_dpp_dto() local
116 dppclk_khz = context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz; in dcn20_update_clocks_update_dpp_dto()
120 if (safe_to_lower || prev_dppclk_khz < dppclk_khz) in dcn20_update_clocks_update_dpp_dto()
122 clk_mgr->dccg, dpp_inst, dppclk_khz); in dcn20_update_clocks_update_dpp_dto()
129 * clk_mgr->base.dentist_vco_freq_khz / clk_mgr->base.clks.dppclk_khz; in dcn20_update_clocks_update_dentist()
225 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn2_update_clocks()
226 if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz) in dcn2_update_clocks()
228 clk_mgr->base.clks.dppclk_khz = new_clocks->dppclk_khz; in dcn2_update_clocks()
240 new_clocks->disp_dpp_voltage_level_khz = new_clocks->dppclk_khz; in dcn2_update_clocks()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
H A Drn_clk_mgr.c164 if (new_clocks->dppclk_khz < 100000 && new_clocks->dppclk_khz > 0) in rn_update_clocks()
165 new_clocks->dppclk_khz = 100000; in rn_update_clocks()
172 if (new_clocks->dppclk_khz == 0 || new_clocks->dispclk_khz == 0) { in rn_update_clocks()
173 new_clocks->dppclk_khz = clk_mgr_base->clks.dppclk_khz; in rn_update_clocks()
177 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr_base->clks.dppclk_khz)) { in rn_update_clocks()
178 if (clk_mgr_base->clks.dppclk_khz > new_clocks->dppclk_khz) in rn_update_clocks()
180 clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz; in rn_update_clocks()
194 rn_vbios_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in rn_update_clocks()
198 rn_vbios_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in rn_update_clocks()
200 if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz) in rn_update_clocks()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30_clk_mgr.c306 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr_base->clks.dppclk_khz)) { in dcn3_update_clocks()
307 if (clk_mgr_base->clks.dppclk_khz > new_clocks->dppclk_khz) in dcn3_update_clocks()
310 clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz; in dcn3_update_clocks()
311 dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_PIXCLK, clk_mgr_base->clks.dppclk_khz / 1000); in dcn3_update_clocks()
428 else if (a->dppclk_khz != b->dppclk_khz) in dcn3_are_clock_states_equal()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv1_clk_mgr.c44 bool request_dpp_div = new_clocks->dispclk_khz > new_clocks->dppclk_khz; in rv1_determine_dppclk_threshold()
47 bool cur_dpp_div = clk_mgr->base.clks.dispclk_khz > clk_mgr->base.clks.dppclk_khz; in rv1_determine_dppclk_threshold()
96 bool request_dpp_div = new_clocks->dispclk_khz > new_clocks->dppclk_khz; in ramp_up_dispclk_with_dpp()
186 clk_mgr->base.clks.dppclk_khz = new_clocks->dppclk_khz; in ramp_up_dispclk_with_dpp()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_debug.c353 context->bw_ctx.bw.dcn.clk.dppclk_khz, in context_clock_trace()
361 context->bw_ctx.bw.dcn.clk.dppclk_khz, in context_clock_trace()
H A Ddc.c3024 info->dppClock = (unsigned int)state->bw_ctx.bw.dcn.clk.dppclk_khz; in get_clock_requirements_for_state()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/inc/
H A Dcore_types.h255 int dppclk_khz; member
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer.c455 dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz, in dcn10_log_hw_state()
2517 context->bw_ctx.bw.dcn.clk.dppclk_khz <= in dcn10_update_dchubp_dpp()
2529 pipe_ctx->plane_res.bw.dppclk_khz); in dcn10_update_dchubp_dpp()
2531 dc->clk_mgr->clks.dppclk_khz = should_divided_by_2 ? in dcn10_update_dchubp_dpp()
3751 current_clocks->dppclk_khz = clk_khz; in dcn10_set_clock()
H A Ddcn10_hw_sequencer_debug.c478 dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz, in dcn10_get_clock_states()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/
H A Ddc.h342 int dppclk_khz; member
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_resource.c3090 context->bw_ctx.bw.dcn.clk.dppclk_khz = 0;
3102 if (context->bw_ctx.bw.dcn.clk.dppclk_khz < pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000)
3103 context->bw_ctx.bw.dcn.clk.dppclk_khz = pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000;
3104 context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz =
3110 context->bw_ctx.bw.dcn.clk.bw_dppclk_khz = context->bw_ctx.bw.dcn.clk.dppclk_khz;
H A Ddcn20_hwseq.c1304 if (old_pipe->plane_res.bw.dppclk_khz != new_pipe->plane_res.bw.dppclk_khz) in dcn20_detect_pipe_changes()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/calcs/
H A Ddcn_calcs.c1190 context->bw_ctx.bw.dcn.clk.dppclk_khz = context->bw_ctx.bw.dcn.clk.dispclk_khz / in dcn_validate_bandwidth()
1439 dc, DM_PP_CLOCK_TYPE_DPPCLK, clocks->dppclk_khz); in dcn_find_dcfclk_suits_all()