Searched refs:dlbu_registers (Results 1 – 3 of 3) sorted by relevance
141 u32 dlbu_registers[7]; in mali_dlbu_reset() local147 dlbu_registers[0] = mali_dlbu_phys_addr | 1; /* bit 0 enables the whole core */ in mali_dlbu_reset()148 dlbu_registers[1] = MALI_DLBU_VIRT_ADDR; in mali_dlbu_reset()149 dlbu_registers[2] = 0; in mali_dlbu_reset()150 dlbu_registers[3] = 0; in mali_dlbu_reset()151 dlbu_registers[4] = 0; in mali_dlbu_reset()152 dlbu_registers[5] = 0; in mali_dlbu_reset()153 dlbu_registers[6] = dlbu->pp_cores_mask; in mali_dlbu_reset()156 …write_array_relaxed(&dlbu->hw_core, MALI_DLBU_REGISTER_MASTER_TLLIST_PHYS_ADDR, dlbu_registers, 7); in mali_dlbu_reset()
190 return job->uargs.dlbu_registers; in mali_pp_job_get_dlbu_registers()
373 u32 dlbu_registers[_MALI_DLBU_MAX_REGISTERS]; /**< [in] Dynamic load balancing unit registers */ member