Searched refs:dfin_pll (Results 1 – 1 of 1) sorted by relevance
260 unsigned long dfin_pll, dfvco, dpll_out; in exynos_mipi_dsi_change_pll() local263 dfin_pll = (FIN_HZ / pre_divider); in exynos_mipi_dsi_change_pll()285 if (dfin_pll < DFIN_PLL_MIN_HZ || dfin_pll > DFIN_PLL_MAX_HZ) { in exynos_mipi_dsi_change_pll()289 if (dfin_pll < 7 * MHZ) in exynos_mipi_dsi_change_pll()291 else if (dfin_pll < 8 * MHZ) in exynos_mipi_dsi_change_pll()293 else if (dfin_pll < 9 * MHZ) in exynos_mipi_dsi_change_pll()295 else if (dfin_pll < 10 * MHZ) in exynos_mipi_dsi_change_pll()297 else if (dfin_pll < 11 * MHZ) in exynos_mipi_dsi_change_pll()303 dfvco = dfin_pll * main_divider; in exynos_mipi_dsi_change_pll()305 dfvco, dfin_pll, main_divider); in exynos_mipi_dsi_change_pll()