Searched refs:current_phase (Results 1 – 9 of 9) sorted by relevance
57 int max_phase = MIN_VALUE, current_phase; in ddr3_tip_write_additional_odt_setting() local89 current_phase = ((int)val & 0xe0) >> 6; in ddr3_tip_write_additional_odt_setting()90 if (current_phase >= max_phase) in ddr3_tip_write_additional_odt_setting()91 max_phase = current_phase; in ddr3_tip_write_additional_odt_setting()
334 uint8 current_phase; member933 prot->d2hring_ctrl_cpln.current_phase = BCMPCIE_CMNHDR_PHASE_BIT_INIT; in dhd_prot_d2h_sync_init()936 prot->d2hring_tx_cpln.current_phase = BCMPCIE_CMNHDR_PHASE_BIT_INIT; in dhd_prot_d2h_sync_init()939 prot->d2hring_rx_cpln.current_phase = BCMPCIE_CMNHDR_PHASE_BIT_INIT; in dhd_prot_d2h_sync_init()961 prot->h2dring_rxp_subn.current_phase = 0; in dhd_prot_h2d_sync_init()964 prot->h2dring_ctrl_subn.current_phase = 0; in dhd_prot_h2d_sync_init()3526 rxbuf_post->cmn_hdr.flags = ring->current_phase; in dhd_prot_rxbuf_post()3561 ring->current_phase = ring->current_phase ? in dhd_prot_rxbuf_post()3704 infobuf_post->cmn_hdr.flags = ring->current_phase; in dhd_prot_infobufpost()3765 ring->current_phase = ring->current_phase ? in dhd_prot_infobufpost()[all …]
425 uint8 current_phase; member1303 prot->d2hring_ctrl_cpln.current_phase = BCMPCIE_CMNHDR_PHASE_BIT_INIT; in dhd_prot_d2h_sync_init()1306 prot->d2hring_tx_cpln.current_phase = BCMPCIE_CMNHDR_PHASE_BIT_INIT; in dhd_prot_d2h_sync_init()1309 prot->d2hring_rx_cpln.current_phase = BCMPCIE_CMNHDR_PHASE_BIT_INIT; in dhd_prot_d2h_sync_init()1358 prot->h2dring_rxp_subn.current_phase = 0; in dhd_prot_h2d_sync_init()1361 prot->h2dring_ctrl_subn.current_phase = 0; in dhd_prot_h2d_sync_init()3914 prot->h2dring_info_subn->current_phase = 0;3916 prot->d2hring_info_cpln->current_phase = BCMPCIE_CMNHDR_PHASE_BIT_INIT;4045 prot->d2hring_hp2p_txcpl->current_phase = BCMPCIE_CMNHDR_PHASE_BIT_INIT;4060 prot->d2hring_hp2p_rxcpl->current_phase = BCMPCIE_CMNHDR_PHASE_BIT_INIT;[all …]
504 uint8 current_phase; member1612 prot->d2hring_ctrl_cpln.current_phase = BCMPCIE_CMNHDR_PHASE_BIT_INIT; in dhd_prot_d2h_sync_init()1615 prot->d2hring_tx_cpln.current_phase = BCMPCIE_CMNHDR_PHASE_BIT_INIT; in dhd_prot_d2h_sync_init()1618 prot->d2hring_rx_cpln.current_phase = BCMPCIE_CMNHDR_PHASE_BIT_INIT; in dhd_prot_d2h_sync_init()1650 prot->h2dring_rxp_subn.current_phase = 0; in dhd_prot_h2d_sync_init()1653 prot->h2dring_ctrl_subn.current_phase = 0; in dhd_prot_h2d_sync_init()4603 prot->h2dring_info_subn->current_phase = 0; in dhd_prot_init_info_rings()4605 prot->d2hring_info_cpln->current_phase = BCMPCIE_CMNHDR_PHASE_BIT_INIT; in dhd_prot_init_info_rings()4740 prot->d2hring_hp2p_txcpl->current_phase = BCMPCIE_CMNHDR_PHASE_BIT_INIT; in dhd_prot_init_hp2p_rings()4755 prot->d2hring_hp2p_rxcpl->current_phase = BCMPCIE_CMNHDR_PHASE_BIT_INIT; in dhd_prot_init_hp2p_rings()[all …]
508 uint8 current_phase; member1616 prot->d2hring_ctrl_cpln.current_phase = BCMPCIE_CMNHDR_PHASE_BIT_INIT; in dhd_prot_d2h_sync_init()1619 prot->d2hring_tx_cpln.current_phase = BCMPCIE_CMNHDR_PHASE_BIT_INIT; in dhd_prot_d2h_sync_init()1622 prot->d2hring_rx_cpln.current_phase = BCMPCIE_CMNHDR_PHASE_BIT_INIT; in dhd_prot_d2h_sync_init()1654 prot->h2dring_rxp_subn.current_phase = 0; in dhd_prot_h2d_sync_init()1657 prot->h2dring_ctrl_subn.current_phase = 0; in dhd_prot_h2d_sync_init()4607 prot->h2dring_info_subn->current_phase = 0; in dhd_prot_init_info_rings()4609 prot->d2hring_info_cpln->current_phase = BCMPCIE_CMNHDR_PHASE_BIT_INIT; in dhd_prot_init_info_rings()4744 prot->d2hring_hp2p_txcpl->current_phase = BCMPCIE_CMNHDR_PHASE_BIT_INIT; in dhd_prot_init_hp2p_rings()4759 prot->d2hring_hp2p_rxcpl->current_phase = BCMPCIE_CMNHDR_PHASE_BIT_INIT; in dhd_prot_init_hp2p_rings()[all …]
319 unsigned char current_phase,
544 unsigned char current_phase, in nsp_expect_signal() argument565 if ((phase & mask) != 0 && (phase & BUSMON_PHASE_MASK) == current_phase) { in nsp_expect_signal()