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Searched refs:ctrl_ddrio_0 (Results 1 – 3 of 3) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/mach-omap2/omap5/
H A Dhw_data.c627 .ctrl_ddrio_0 = DDR_IO_0_DDR2_DQ_INT_EN_ALL_DDR3_CA_DIS_ALL,
636 .ctrl_ddrio_0 = DDR_IO_0_VREF_CELLS_DDR3_VALUE,
647 .ctrl_ddrio_0 = DDR_IO_0_VREF_CELLS_DDR3_VALUE_ES2,
658 .ctrl_ddrio_0 = 0x00094A40,
670 .ctrl_ddrio_0 = 0x00094A40,
682 .ctrl_ddrio_0 = 0x00094A40,
H A Dhwinit.c68 writel(ioregs->ctrl_ddrio_0, (*ctrl)->control_ddrio_0); in io_settings_lpddr2()
88 writel(ioregs->ctrl_ddrio_0, (*ctrl)->control_ddrio_0); in io_settings_ddr3()
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-omap5/
H A Domap.h244 u32 ctrl_ddrio_0; member