| /OK3568_Linux_fs/kernel/drivers/staging/greybus/ |
| H A D | arche-apb-ctrl.c | 39 struct gpio_desc *clk_en; member
102 if (apb->clk_en) in coldboot_seq()
103 gpiod_set_value(apb->clk_en, 1); in coldboot_seq()
205 if (apb->clk_en) in poweroff_seq()
206 gpiod_set_value(apb->clk_en, 0); in poweroff_seq()
346 apb->clk_en = devm_gpiod_get_optional(dev, "clock-en", GPIOD_OUT_LOW); in apb_ctrl_get_devtree_data()
347 if (IS_ERR(apb->clk_en)) { in apb_ctrl_get_devtree_data()
348 ret = PTR_ERR(apb->clk_en); in apb_ctrl_get_devtree_data()
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_dccg.c | 82 uint32_t clk_en = 0; in dccg2_get_dccg_ref_freq() local
85 REG_GET_2(REFCLK_CNTL, REFCLK_CLOCK_EN, &clk_en, REFCLK_SRC_SEL, &clk_sel); in dccg2_get_dccg_ref_freq()
87 if (clk_en != 0) { in dccg2_get_dccg_ref_freq()
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| /OK3568_Linux_fs/kernel/drivers/staging/rts5208/ |
| H A D | rtsx_card.c | 849 u8 clk_en = 0; in enable_card_clock() local
852 clk_en |= XD_CLK_EN; in enable_card_clock()
854 clk_en |= SD_CLK_EN; in enable_card_clock()
856 clk_en |= MS_CLK_EN; in enable_card_clock()
858 retval = rtsx_write_register(chip, CARD_CLK_EN, clk_en, clk_en); in enable_card_clock()
868 u8 clk_en = 0; in disable_card_clock() local
871 clk_en |= XD_CLK_EN; in disable_card_clock()
873 clk_en |= SD_CLK_EN; in disable_card_clock()
875 clk_en |= MS_CLK_EN; in disable_card_clock()
877 retval = rtsx_write_register(chip, CARD_CLK_EN, clk_en, 0); in disable_card_clock()
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| /OK3568_Linux_fs/kernel/drivers/spi/ |
| H A D | spi-fsl-qspi.c | 269 struct clk *clk, *clk_en; member
476 ret = clk_prepare_enable(q->clk_en); in fsl_qspi_clk_prep_enable()
482 clk_disable_unprepare(q->clk_en); in fsl_qspi_clk_prep_enable()
498 clk_disable_unprepare(q->clk_en); in fsl_qspi_clk_disable_unprep()
893 q->clk_en = devm_clk_get(dev, "qspi_en"); in fsl_qspi_probe()
894 if (IS_ERR(q->clk_en)) { in fsl_qspi_probe()
895 ret = PTR_ERR(q->clk_en); in fsl_qspi_probe()
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| H A D | spi-nxp-fspi.c | 353 struct clk *clk, *clk_en; member
571 ret = clk_prepare_enable(f->clk_en); in nxp_fspi_clk_prep_enable()
577 clk_disable_unprepare(f->clk_en); in nxp_fspi_clk_prep_enable()
590 clk_disable_unprepare(f->clk_en); in nxp_fspi_clk_disable_unprep()
1054 f->clk_en = devm_clk_get(dev, "fspi_en"); in nxp_fspi_probe()
1055 if (IS_ERR(f->clk_en)) { in nxp_fspi_probe()
1056 ret = PTR_ERR(f->clk_en); in nxp_fspi_probe()
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| /OK3568_Linux_fs/kernel/drivers/mmc/host/ |
| H A D | sdhci-of-esdhc.c | 578 u32 val, clk_en; in esdhc_clock_enable() local
580 clk_en = ESDHC_CLOCK_SDCLKEN; in esdhc_clock_enable()
587 clk_en |= (ESDHC_CLOCK_IPGEN | ESDHC_CLOCK_HCKEN | in esdhc_clock_enable()
593 val |= clk_en; in esdhc_clock_enable()
595 val &= ~clk_en; in esdhc_clock_enable()
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/ssv6xxx/hwif/sdio/ |
| H A D | sdio.c | 342 u32 clk_en; in ssv6xxx_sdio_load_firmware_openfile() local
346 if(ssv6xxx_sdio_read_reg(child, ADR_PLATFORM_CLOCK_ENABLE, &clk_en)); in ssv6xxx_sdio_load_firmware_openfile()
347 if(ssv6xxx_sdio_write_reg(child, ADR_PLATFORM_CLOCK_ENABLE, clk_en | (1 << 2))); in ssv6xxx_sdio_load_firmware_openfile()
541 u32 clk_en; in ssv6xxx_sdio_load_firmware_request() local
544 if(ssv6xxx_sdio_read_reg(child, ADR_PLATFORM_CLOCK_ENABLE, &clk_en)); in ssv6xxx_sdio_load_firmware_request()
545 if(ssv6xxx_sdio_write_reg(child, ADR_PLATFORM_CLOCK_ENABLE, clk_en | (1 << 2))); in ssv6xxx_sdio_load_firmware_request()
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/hal_g6/phy/bb/ |
| H A D | halbb_dbg.h | 139 u32 clk_en; member
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| H A D | halbb_dbg.c | 168 halbb_set_reg(bb, cr->clk_en, cr->clk_en_m, reg_value); in halbb_bb_dbg_port_clock_en()
1860 cr->clk_en = 0x09F4; in halbb_cr_cfg_dbg_init()
1874 cr->clk_en = DBG_PORT_REF_CLK_EN_A; in halbb_cr_cfg_dbg_init()
1905 cr->clk_en = DBG_PORT_REF_CLK_EN_C; in halbb_cr_cfg_dbg_init()
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/phl/hal_g6/phy/bb/ |
| H A D | halbb_dbg.h | 139 u32 clk_en; member
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| H A D | halbb_dbg.c | 168 halbb_set_reg(bb, cr->clk_en, cr->clk_en_m, reg_value); in halbb_bb_dbg_port_clock_en()
1860 cr->clk_en = 0x09F4; in halbb_cr_cfg_dbg_init()
1874 cr->clk_en = DBG_PORT_REF_CLK_EN_A; in halbb_cr_cfg_dbg_init()
1905 cr->clk_en = DBG_PORT_REF_CLK_EN_C; in halbb_cr_cfg_dbg_init()
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