Searched refs:cime_rama_h (Results 1 – 3 of 3) sorted by relevance
1329 regs->me_ram.cime_rama_h = 12; in vepu541_h265_set_me_regs()1331 regs->me_ram.cime_rama_h = 16; in vepu541_h265_set_me_regs()1333 regs->me_ram.cime_rama_h = 20; in vepu541_h265_set_me_regs()1339 if (regs->me_ram.cime_rama_h / 4 < tmpMin) { in vepu541_h265_set_me_regs()1340 tmpMin = regs->me_ram.cime_rama_h / 4; in vepu541_h265_set_me_regs()1407 regs->me_ram.cime_rama_h = h_temp; in vepu540_h265_set_me_ram()1415 if (regs->me_ram.cime_rama_h / 4 < tmpMin) { in vepu540_h265_set_me_ram()1416 tmpMin = regs->me_ram.cime_rama_h / 4; in vepu540_h265_set_me_ram()1422 … regs->me_ram.cime_rama_h, regs->me_ram.cime_rama_max, regs->me_ram.cime_linebuf_w); in vepu540_h265_set_me_ram()
263 RK_U32 cime_rama_h = ctu_4_h; in vepu580_h265_set_me_ram() local280 while ((cime_rama_h < cur_srch_max) && (cime_rama_max > in vepu580_h265_set_me_ram()281 …((cime_rama_h - ctu_4_h) * regs->reg0222_me_cach.cme_linebuf_w * 4 + (ramb_h * 4 * cur_srch_16_w))… in vepu580_h265_set_me_ram()282 cime_rama_h = cime_rama_h + ctu_4_h; in vepu580_h265_set_me_ram()290 cime_rama_h = cime_rama_h + ctu_4_h; in vepu580_h265_set_me_ram()293 …if (cime_rama_max < ((cime_rama_h - ctu_4_h) * regs->reg0222_me_cach.cme_linebuf_w * 4 + (ramb_h *… in vepu580_h265_set_me_ram()294 cime_rama_h = cime_rama_h - ctu_4_h; in vepu580_h265_set_me_ram()296 regs->reg0222_me_cach.cme_rama_h = cime_rama_h; /* cime_rama_max */ in vepu580_h265_set_me_ram()299 RK_U32 ram_col_h = (cime_rama_h - ctu_4_h) / ctu_4_h; in vepu580_h265_set_me_ram()
598 RK_U32 cime_rama_h : 5; member