Searched refs:base_drexi0 (Results 1 – 1 of 1) sorted by relevance
156 void __iomem *base_drexi0; member392 dmc->base_drexi0 + EXYNOS5_DREXI_TIMINGAREF); in exynos5_set_bypass_dram_timings()395 dmc->base_drexi0 + EXYNOS5_DREXI_TIMINGROW1); in exynos5_set_bypass_dram_timings()399 dmc->base_drexi0 + EXYNOS5_DREXI_TIMINGDATA1); in exynos5_set_bypass_dram_timings()403 dmc->base_drexi0 + EXYNOS5_DREXI_TIMINGPOWER1); in exynos5_set_bypass_dram_timings()432 dmc->base_drexi0 + EXYNOS5_DREXI_TIMINGAREF); in exynos5_dram_change_timings()435 dmc->base_drexi0 + EXYNOS5_DREXI_TIMINGROW0); in exynos5_dram_change_timings()439 dmc->base_drexi0 + EXYNOS5_DREXI_TIMINGDATA0); in exynos5_dram_change_timings()443 dmc->base_drexi0 + EXYNOS5_DREXI_TIMINGPOWER0); in exynos5_dram_change_timings()771 writel(PERF_CNT2, dmc->base_drexi0 + DREX_INTENS_PPC); in exynos5_dmc_start_perf_events()[all …]