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Searched refs:_2y (Results 1 – 6 of 6) sorted by relevance

/OK3568_Linux_fs/external/mpp/mpp/hal/rkenc/common/
H A Dvepu5xx_common.c27 ._2y = {.r_coeff = 66, .g_coeff = 129, .b_coeff = 25, .offset = 16},
34 ._2y = {.r_coeff = 47, .g_coeff = 157, .b_coeff = 16, .offset = 16},
45 ._2y = {.r_coeff = 77, .g_coeff = 150, .b_coeff = 29, .offset = 0},
52 ._2y = {.r_coeff = 54, .g_coeff = 183, .b_coeff = 18, .offset = 0},
H A Dvepu5xx_common.h37 VepuRgb2YuvCoeffs _2y; member
/OK3568_Linux_fs/external/mpp/mpp/hal/rkenc/h264e/
H A Dhal_h264e_vepu541.c491 regs->reg018.csc_wgt_b2y = cfg_coeffs->_2y.b_coeff; in setup_vepu541_prep()
492 regs->reg018.csc_wgt_g2y = cfg_coeffs->_2y.g_coeff; in setup_vepu541_prep()
493 regs->reg018.csc_wgt_r2y = cfg_coeffs->_2y.r_coeff; in setup_vepu541_prep()
503 regs->reg021.csc_ofst_y = cfg_coeffs->_2y.offset; in setup_vepu541_prep()
H A Dhal_h264e_vepu580.c750 regs->reg_base.src_udfy.csc_wgt_b2y = cfg_coeffs->_2y.b_coeff; in setup_vepu580_prep()
751 regs->reg_base.src_udfy.csc_wgt_g2y = cfg_coeffs->_2y.g_coeff; in setup_vepu580_prep()
752 regs->reg_base.src_udfy.csc_wgt_r2y = cfg_coeffs->_2y.r_coeff; in setup_vepu580_prep()
762 regs->reg_base.src_udfo.csc_ofst_y = cfg_coeffs->_2y.offset; in setup_vepu580_prep()
/OK3568_Linux_fs/external/mpp/mpp/hal/rkenc/h265e/
H A Dhal_h265e_vepu541.c1140 regs->src_udfy.wght_r2y = cfg_coeffs->_2y.r_coeff; in vepu541_h265_set_pp_regs()
1141 regs->src_udfy.wght_g2y = cfg_coeffs->_2y.g_coeff; in vepu541_h265_set_pp_regs()
1142 regs->src_udfy.wght_b2y = cfg_coeffs->_2y.b_coeff; in vepu541_h265_set_pp_regs()
1152 regs->src_udfo.ofst_y = cfg_coeffs->_2y.offset; in vepu541_h265_set_pp_regs()
H A Dhal_h265e_vepu580.c1950 reg_base->reg0199_src_udfy.csc_wgt_r2y = cfg_coeffs->_2y.r_coeff; in vepu580_h265_set_pp_regs()
1951 reg_base->reg0199_src_udfy.csc_wgt_g2y = cfg_coeffs->_2y.g_coeff; in vepu580_h265_set_pp_regs()
1952 reg_base->reg0199_src_udfy.csc_wgt_b2y = cfg_coeffs->_2y.b_coeff; in vepu580_h265_set_pp_regs()
1962 reg_base->reg0202_src_udfo.csc_ofst_y = cfg_coeffs->_2y.offset; in vepu580_h265_set_pp_regs()