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Searched refs:VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL__SHIFT (Results 1 – 10 of 10) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h9482 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL__SHIFT 0x00000018 macro
H A Ddce_8_0_sh_mask.h11012 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL__SHIFT 0x18 macro
H A Ddce_10_0_sh_mask.h11396 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL__SHIFT 0x18 macro
H A Ddce_11_0_sh_mask.h11208 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL__SHIFT 0x18 macro
H A Ddce_11_2_sh_mask.h12462 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL__SHIFT 0x18 macro
H A Ddce_12_0_sh_mask.h2065 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL__SHIFT … macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h1615 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h116 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h115 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h95 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL__SHIFT … macro