Searched refs:VEPU_REG_CHECKPOINT_CHECK0 (Results 1 – 5 of 5) sorted by relevance
398 | VEPU_REG_CHECKPOINT_CHECK0(hw_mbrc->cp_target[1]); in hal_h264e_vepu1_gen_regs_v2()402 | VEPU_REG_CHECKPOINT_CHECK0(hw_mbrc->cp_target[3]); in hal_h264e_vepu1_gen_regs_v2()406 | VEPU_REG_CHECKPOINT_CHECK0(hw_mbrc->cp_target[5]); in hal_h264e_vepu1_gen_regs_v2()410 | VEPU_REG_CHECKPOINT_CHECK0(hw_mbrc->cp_target[7]); in hal_h264e_vepu1_gen_regs_v2()414 | VEPU_REG_CHECKPOINT_CHECK0(hw_mbrc->cp_target[9]); in hal_h264e_vepu1_gen_regs_v2()
435 | VEPU_REG_CHECKPOINT_CHECK0(hw_mbrc->cp_target[1]); in hal_h264e_vepu2_gen_regs_v2()439 | VEPU_REG_CHECKPOINT_CHECK0(hw_mbrc->cp_target[3]); in hal_h264e_vepu2_gen_regs_v2()443 | VEPU_REG_CHECKPOINT_CHECK0(hw_mbrc->cp_target[5]); in hal_h264e_vepu2_gen_regs_v2()447 | VEPU_REG_CHECKPOINT_CHECK0(hw_mbrc->cp_target[7]); in hal_h264e_vepu2_gen_regs_v2()451 | VEPU_REG_CHECKPOINT_CHECK0(hw_mbrc->cp_target[9]); in hal_h264e_vepu2_gen_regs_v2()
137 #define VEPU_REG_CHECKPOINT_CHECK0(x) (((x) & 0xffff)) macro
127 #define VEPU_REG_CHECKPOINT_CHECK0(x) (((x) & 0xffff)) macro