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Searched refs:UVD_SUVD_CGC_CTRL__SRE_MODE_MASK (Results 1 – 14 of 14) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h255 #define UVD_SUVD_CGC_CTRL__SRE_MODE_MASK macro
H A Duvd_5_0_sh_mask.h785 #define UVD_SUVD_CGC_CTRL__SRE_MODE_MASK 0x1 macro
H A Duvd_6_0_sh_mask.h779 #define UVD_SUVD_CGC_CTRL__SRE_MODE_MASK 0x1 macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Duvd_v5_0.c683 data2 &= ~(UVD_SUVD_CGC_CTRL__SRE_MODE_MASK | in uvd_v5_0_set_sw_clock_gating()
H A Dvcn_v1_0.c555 data &= ~(UVD_SUVD_CGC_CTRL__SRE_MODE_MASK in vcn_v1_0_disable_clock_gating()
628 data |= (UVD_SUVD_CGC_CTRL__SRE_MODE_MASK in vcn_v1_0_enable_clock_gating()
H A Dvcn_v2_5.c647 data &= ~(UVD_SUVD_CGC_CTRL__SRE_MODE_MASK in vcn_v2_5_disable_clock_gating()
757 data |= (UVD_SUVD_CGC_CTRL__SRE_MODE_MASK in vcn_v2_5_enable_clock_gating()
H A Dvcn_v2_0.c580 data &= ~(UVD_SUVD_CGC_CTRL__SRE_MODE_MASK in vcn_v2_0_disable_clock_gating()
690 data |= (UVD_SUVD_CGC_CTRL__SRE_MODE_MASK in vcn_v2_0_enable_clock_gating()
H A Dvcn_v3_0.c758 data &= ~(UVD_SUVD_CGC_CTRL__SRE_MODE_MASK in vcn_v3_0_disable_clock_gating()
874 data |= (UVD_SUVD_CGC_CTRL__SRE_MODE_MASK in vcn_v3_0_enable_clock_gating()
H A Duvd_v6_0.c1344 data2 &= ~(UVD_SUVD_CGC_CTRL__SRE_MODE_MASK | in uvd_v6_0_set_sw_clock_gating()
H A Duvd_v7_0.c1624 data2 &= ~(UVD_SUVD_CGC_CTRL__SRE_MODE_MASK |
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h547 #define UVD_SUVD_CGC_CTRL__SRE_MODE_MASK macro
H A Dvcn_2_5_sh_mask.h2180 #define UVD_SUVD_CGC_CTRL__SRE_MODE_MASK macro
H A Dvcn_2_0_0_sh_mask.h3306 #define UVD_SUVD_CGC_CTRL__SRE_MODE_MASK macro
H A Dvcn_3_0_0_sh_mask.h2937 #define UVD_SUVD_CGC_CTRL__SRE_MODE_MASK macro