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Searched refs:UVD_POWER_STATUS__UVD_POWER_STATUS_MASK (Results 1 – 14 of 14) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v2_5.c779 ~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v2_5_start_dpg_mode()
934 ~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v2_5_start()
1310 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v2_5_stop_dpg_mode()
1323 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v2_5_stop_dpg_mode()
1390 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK, in vcn_v2_5_stop()
1391 ~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v2_5_stop()
1416 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v2_5_pause_dpg_mode()
1461 UVD_PGFSM_CONFIG__UVDM_UVDU_PWR_ON, UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v2_5_pause_dpg_mode()
1467 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v2_5_pause_dpg_mode()
H A Dvcn_v1_0.c747 data &= ~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK; in vcn_1_0_enable_static_power_gating()
1172 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v1_0_stop_dpg_mode()
1189 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v1_0_stop_dpg_mode()
1234 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v1_0_pause_dpg_mode()
1264 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v1_0_pause_dpg_mode()
1290 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v1_0_pause_dpg_mode()
1325 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v1_0_pause_dpg_mode()
H A Dvcn_v3_0.c606 data &= ~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK; in vcn_v3_0_enable_static_power_gating()
903 ~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v3_0_start_dpg_mode()
1439 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v3_0_stop_dpg_mode()
1452 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v3_0_stop_dpg_mode()
1552 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v3_0_pause_dpg_mode()
1591 UVD_PGFSM_CONFIG__UVDM_UVDU_PWR_ON, UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v3_0_pause_dpg_mode()
H A Dvcn_v2_0.c762 data &= ~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK; in vcn_v2_0_enable_static_power_gating()
1110 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v2_0_stop_dpg_mode()
1123 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v2_0_stop_dpg_mode()
1216 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v2_0_pause_dpg_mode()
1264 UVD_POWER_STATUS__UVD_POWER_STATUS_MASK); in vcn_v2_0_pause_dpg_mode()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h36 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK … macro
H A Duvd_3_1_sh_mask.h737 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK 0x1 macro
H A Duvd_4_0_sh_mask.h586 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK 0x00000001L macro
H A Duvd_4_2_sh_mask.h743 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK 0x1 macro
H A Duvd_5_0_sh_mask.h927 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK 0x3 macro
H A Duvd_6_0_sh_mask.h915 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK 0x3 macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h80 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK … macro
H A Dvcn_2_5_sh_mask.h1520 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK … macro
H A Dvcn_2_0_0_sh_mask.h1517 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK … macro
H A Dvcn_3_0_0_sh_mask.h2054 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK … macro