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Searched refs:T_RP (Results 1 – 6 of 6) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/ddr/microchip/
H A Dddr2.c160 prech2ras = DIV_ROUND_UP(T_RP, T_CK_CTRL) - 1; in ddr2_ctrl_init()
181 writel((DIV_ROUND_UP(T_RP, T_CK_CTRL) | in ddr2_ctrl_init()
210 host_load_cmd(ctrl, 1, 0x04, PRECH_ALL_CMD, T_RP + T_CK); in ddr2_ctrl_init()
233 host_load_cmd(ctrl, 6, 4, PRECH_ALL_CMD, T_RP + T_CK); in ddr2_ctrl_init()
H A Dddr2_timing.h25 #define T_RP 12500 /* psec */ macro
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/aarch64-none-linux-gnu/libc/usr/include/arpa/
H A Dnameser_compat.h139 #define T_RP ns_t_rp macro
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/arm-none-linux-gnueabihf/libc/usr/include/arpa/
H A Dnameser_compat.h139 #define T_RP ns_t_rp macro
/OK3568_Linux_fs/kernel/drivers/memory/tegra/
H A Dtegra210-emc-cc-r21021.c1313 value = (1000 * fake->dram_timings[T_RP]) / src_clk_period; in tegra210_emc_r21021_set_clock()
1322 delay += (1000 * fake->dram_timings[T_RP]) / in tegra210_emc_r21021_set_clock()
1346 delay = ((1000 * fake->dram_timings[T_RP] / src_clk_period) + in tegra210_emc_r21021_set_clock()
H A Dtegra210-emc.h746 T_RP, enumerator