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Searched refs:THM_CLK_CNTL__CMON_CLK_SEL__SHIFT (Results 1 – 11 of 11) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dfiji_baco.c103 …WRITE, mmGCK_SMC_IND_DATA, THM_CLK_CNTL__CMON_CLK_SEL_MASK, THM_CLK_CNTL__CMON_CLK_SEL__SHIFT, 0, …
H A Dci_baco.c119 …WRITE, mmGCK_SMC_IND_DATA, THM_CLK_CNTL__CMON_CLK_SEL_MASK, THM_CLK_CNTL__CMON_CLK_SEL__SHIFT, 0, …
H A Dpolaris_baco.c98 …WRITE, mmGCK_SMC_IND_DATA, THM_CLK_CNTL__CMON_CLK_SEL_MASK, THM_CLK_CNTL__CMON_CLK_SEL__SHIFT, 0, …
H A Dtonga_baco.c111 …RITE, mmGCK_SMC_IND_DATA, THM_CLK_CNTL__CMON_CLK_SEL_MASK, THM_CLK_CNTL__CMON_CLK_SEL__SHIFT, 0, …
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Dcik.c1760 data |= (1 << THM_CLK_CNTL__CMON_CLK_SEL__SHIFT) | in cik_program_aspm()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/smu/
H A Dsmu_7_0_0_sh_mask.h264 #define THM_CLK_CNTL__CMON_CLK_SEL__SHIFT 0x0 macro
H A Dsmu_7_1_1_sh_mask.h262 #define THM_CLK_CNTL__CMON_CLK_SEL__SHIFT 0x0 macro
H A Dsmu_7_1_0_sh_mask.h260 #define THM_CLK_CNTL__CMON_CLK_SEL__SHIFT 0x0 macro
H A Dsmu_7_0_1_sh_mask.h262 #define THM_CLK_CNTL__CMON_CLK_SEL__SHIFT 0x0 macro
H A Dsmu_7_1_3_sh_mask.h290 #define THM_CLK_CNTL__CMON_CLK_SEL__SHIFT 0x0 macro
H A Dsmu_7_1_2_sh_mask.h262 #define THM_CLK_CNTL__CMON_CLK_SEL__SHIFT 0x0 macro