Searched refs:SM5502_IRQ_INT1_OVP_EVENT_MASK (Results 1 – 2 of 2) sorted by relevance
270 #define SM5502_IRQ_INT1_OVP_EVENT_MASK BIT(5) macro
177 { .reg_offset = 0, .mask = SM5502_IRQ_INT1_OVP_EVENT_MASK, },