Searched refs:SGMII_DIG_LP_ENA_REG (Results 1 – 2 of 2) sorted by relevance
840 reg_write(SGMII_DIG_LP_ENA_REG(0), 0x400); in serdes_phy_config()841 DEBUG_WR_REG(SGMII_DIG_LP_ENA_REG(0), 0x400); in serdes_phy_config()878 reg_write(SGMII_DIG_LP_ENA_REG(sgmii_port), 0); in serdes_phy_config()879 DEBUG_WR_REG(SGMII_DIG_LP_ENA_REG(sgmii_port), 0); in serdes_phy_config()
152 #define SGMII_DIG_LP_ENA_REG(port) (MV_ETH_REGS_BASE(port) + 0xE8C) macro