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Searched refs:SET_CLR_WOR2 (Results 1 – 9 of 9) sorted by relevance

/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/hal_g6/mac/mac_ax/
H A Drx_filter.c357 val32 = SET_CLR_WOR2(val32, fwd_target, in mac_set_typsbtyp_fltr_opt()
365 val32 = SET_CLR_WOR2(val32, fwd_target, in mac_set_typsbtyp_fltr_opt()
373 val32 = SET_CLR_WOR2(val32, fwd_target, in mac_set_typsbtyp_fltr_opt()
422 val32 = SET_CLR_WOR2(val32, elem->target_arr[idx], in mac_set_typsbtyp_fltr_detail()
H A Ddbgpkg.c3066 val8 = SET_CLR_WOR2(MAC_REG_R8(info->sel_addr), i, in print_dbg_port()
3073 val16 = SET_CLR_WOR2(MAC_REG_R16(info->sel_addr), i, in print_dbg_port()
3080 val32 = SET_CLR_WOR2(MAC_REG_R32(info->sel_addr), i, in print_dbg_port()
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/phl/hal_g6/mac/mac_ax/
H A Drx_filter.c357 val32 = SET_CLR_WOR2(val32, fwd_target, in mac_set_typsbtyp_fltr_opt()
365 val32 = SET_CLR_WOR2(val32, fwd_target, in mac_set_typsbtyp_fltr_opt()
373 val32 = SET_CLR_WOR2(val32, fwd_target, in mac_set_typsbtyp_fltr_opt()
422 val32 = SET_CLR_WOR2(val32, elem->target_arr[idx], in mac_set_typsbtyp_fltr_detail()
H A D_pcie.c1015 tmp_u16 = SET_CLR_WOR2(tmp_u16, PCIE_AUTOK_DIV_2048, BAC_AUTOK_DIV_SH, in mac_auto_refclk_cal_pcie()
2359 val32 = SET_CLR_WOR2(val32, *multi_tag_num, max_tag_num_sh[c_id], in mode_op()
2587 val16 = SET_CLR_WOR2(val16, PCIE_DPHY_DLY_25US, BAC_CMU_EN_DLY_SH, in _patch_pcie_dphy_delay()
2609 val16 = SET_CLR_WOR2(val16, PCIE_AUTOK_4, BAC_AUTOK_N_SH, in _patch_pcie_autok_x()
3668 value32 = SET_CLR_WOR2(value32, tmr_unit, in pcie_trx_mit()
3672 value32 = SET_CLR_WOR2(value32, mit_info->tx_counter, in pcie_trx_mit()
3676 value32 = SET_CLR_WOR2(value32, mit_info->tx_timer, in pcie_trx_mit()
3711 value32 = SET_CLR_WOR2(value32, tmr_unit, in pcie_trx_mit()
3715 value32 = SET_CLR_WOR2(value32, mit_info->rx_counter, in pcie_trx_mit()
3719 value32 = SET_CLR_WOR2(value32, mit_info->rx_timer, in pcie_trx_mit()
[all …]
H A Ddbgpkg.c3066 val8 = SET_CLR_WOR2(MAC_REG_R8(info->sel_addr), i, in print_dbg_port()
3073 val16 = SET_CLR_WOR2(MAC_REG_R16(info->sel_addr), i, in print_dbg_port()
3080 val32 = SET_CLR_WOR2(MAC_REG_R32(info->sel_addr), i, in print_dbg_port()
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/hal_g6/mac/
H A Dpltfm_cfg.h59 #define SET_CLR_WOR2(_w, _v, _sh, _msk) (((_w) & ~(_msk << _sh)) | \ macro
118 #define SET_CLR_WOR2(_w, _v, _sh, _msk) (((_w) & ~(_msk << _sh)) | \ macro
H A Dpltfm_cfg_drv.h62 #define SET_CLR_WOR2(_w, _v, _sh, _msk) (((_w) & ~(_msk << _sh)) | \ macro
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/phl/hal_g6/mac/
H A Dpltfm_cfg.h59 #define SET_CLR_WOR2(_w, _v, _sh, _msk) (((_w) & ~(_msk << _sh)) | \ macro
118 #define SET_CLR_WOR2(_w, _v, _sh, _msk) (((_w) & ~(_msk << _sh)) | \ macro
H A Dpltfm_cfg_drv.h62 #define SET_CLR_WOR2(_w, _v, _sh, _msk) (((_w) & ~(_msk << _sh)) | \ macro