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Searched refs:SDMA0_PHASE1_QUANTUM__VALUE__SHIFT (Results 1 – 10 of 10) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h603 #define SDMA0_PHASE1_QUANTUM__VALUE__SHIFT … macro
H A Dsdma0_4_0_sh_mask.h604 #define SDMA0_PHASE1_QUANTUM__VALUE__SHIFT 0x8 macro
H A Dsdma0_4_2_sh_mask.h606 #define SDMA0_PHASE1_QUANTUM__VALUE__SHIFT … macro
H A Dsdma0_4_2_2_sh_mask.h612 #define SDMA0_PHASE1_QUANTUM__VALUE__SHIFT … macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1020 #define SDMA0_PHASE1_QUANTUM__VALUE__SHIFT 0x8 macro
H A Doss_2_4_sh_mask.h1110 #define SDMA0_PHASE1_QUANTUM__VALUE__SHIFT 0x8 macro
H A Doss_3_0_1_sh_mask.h1130 #define SDMA0_PHASE1_QUANTUM__VALUE__SHIFT 0x8 macro
H A Doss_3_0_sh_mask.h1636 #define SDMA0_PHASE1_QUANTUM__VALUE__SHIFT 0x8 macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h318 #define SDMA0_PHASE1_QUANTUM__VALUE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h319 #define SDMA0_PHASE1_QUANTUM__VALUE__SHIFT … macro