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Searched refs:R_0x44 (Results 1 – 25 of 36) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723ds/hal/phydm/
H A Dphydm_smt_ant.c113 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_cumitek_smt_ant_init_8822b()
456 odm_set_mac_reg(dm, R_0x44, BIT(25) | BIT(24), 0); /*@config P_GPIO[3:2] to data port*/ in phydm_hl_smart_ant_type2_init_8822b()
457 odm_set_mac_reg(dm, R_0x44, BIT(17) | BIT(16), 0x3); /*@enable_output for P_GPIO[3:2]*/ in phydm_hl_smart_ant_type2_init_8822b()
549 reg44_ori = odm_get_mac_reg(dm, R_0x44, MASKDWORD); in phydm_update_beam_pattern_type2()
582 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
583 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
594 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
608 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
610 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
1412 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_hl_smart_ant_type1_init_8821a()
[all …]
H A Dphydm_regtable.h399 #define R_0x44 0x44 macro
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8188fu/hal/phydm/
H A Dphydm_smt_ant.c113 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_cumitek_smt_ant_init_8822b()
456 odm_set_mac_reg(dm, R_0x44, BIT(25) | BIT(24), 0); /*@config P_GPIO[3:2] to data port*/ in phydm_hl_smart_ant_type2_init_8822b()
457 odm_set_mac_reg(dm, R_0x44, BIT(17) | BIT(16), 0x3); /*@enable_output for P_GPIO[3:2]*/ in phydm_hl_smart_ant_type2_init_8822b()
549 reg44_ori = odm_get_mac_reg(dm, R_0x44, MASKDWORD); in phydm_update_beam_pattern_type2()
582 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
583 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
594 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
608 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
610 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
1412 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_hl_smart_ant_type1_init_8821a()
[all …]
H A Dphydm_regtable.h385 #define R_0x44 0x44 macro
H A Dphydm_antdiv.c2298 odm_set_mac_reg(dm, R_0x44, BIT(20) | BIT(19), 0x3); in odm_s0s1_sw_ant_div_init_8188f()
2301 odm_set_mac_reg(dm, R_0x44, BIT(18), 0x1); in odm_s0s1_sw_ant_div_init_8188f()
2321 odm_set_mac_reg(dm, R_0x44, 0x1800, codeword); in phydm_update_rx_idle_antenna_8188F()
2333 odm_set_mac_reg(dm, R_0x44, BIT(10), codeword); in phydm_update_rx_idle_antenna_8188F()
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822bs/hal/phydm/
H A Dphydm_smt_ant.c112 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_cumitek_smt_ant_init_8822b()
455 odm_set_mac_reg(dm, R_0x44, BIT(25) | BIT(24), 0); /*@config P_GPIO[3:2] to data port*/ in phydm_hl_smart_ant_type2_init_8822b()
456 odm_set_mac_reg(dm, R_0x44, BIT(17) | BIT(16), 0x3); /*@enable_output for P_GPIO[3:2]*/ in phydm_hl_smart_ant_type2_init_8822b()
548 reg44_ori = odm_get_mac_reg(dm, R_0x44, MASKDWORD); in phydm_update_beam_pattern_type2()
581 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
582 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
593 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
607 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
609 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
1411 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_hl_smart_ant_type1_init_8821a()
[all …]
H A Dphydm_regtable.h389 #define R_0x44 0x44 macro
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8822cs/hal/phydm/
H A Dphydm_smt_ant.c112 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_cumitek_smt_ant_init_8822b()
455 odm_set_mac_reg(dm, R_0x44, BIT(25) | BIT(24), 0); /*@config P_GPIO[3:2] to data port*/ in phydm_hl_smart_ant_type2_init_8822b()
456 odm_set_mac_reg(dm, R_0x44, BIT(17) | BIT(16), 0x3); /*@enable_output for P_GPIO[3:2]*/ in phydm_hl_smart_ant_type2_init_8822b()
548 reg44_ori = odm_get_mac_reg(dm, R_0x44, MASKDWORD); in phydm_update_beam_pattern_type2()
581 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
582 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
593 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
607 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
609 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
1411 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_hl_smart_ant_type1_init_8821a()
[all …]
H A Dphydm_regtable.h538 #define R_0x44 0x44 macro
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8821cs/hal/phydm/
H A Dphydm_smt_ant.c113 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_cumitek_smt_ant_init_8822b()
456 odm_set_mac_reg(dm, R_0x44, BIT(25) | BIT(24), 0); /*@config P_GPIO[3:2] to data port*/ in phydm_hl_smart_ant_type2_init_8822b()
457 odm_set_mac_reg(dm, R_0x44, BIT(17) | BIT(16), 0x3); /*@enable_output for P_GPIO[3:2]*/ in phydm_hl_smart_ant_type2_init_8822b()
549 reg44_ori = odm_get_mac_reg(dm, R_0x44, MASKDWORD); in phydm_update_beam_pattern_type2()
582 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
583 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
594 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
608 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
610 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
1412 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_hl_smart_ant_type1_init_8821a()
[all …]
H A Dphydm_regtable.h523 #define R_0x44 0x44 macro
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723cs/hal/phydm/
H A Dphydm_smt_ant.c112 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_cumitek_smt_ant_init_8822b()
455 odm_set_mac_reg(dm, R_0x44, BIT(25) | BIT(24), 0); /*@config P_GPIO[3:2] to data port*/ in phydm_hl_smart_ant_type2_init_8822b()
456 odm_set_mac_reg(dm, R_0x44, BIT(17) | BIT(16), 0x3); /*@enable_output for P_GPIO[3:2]*/ in phydm_hl_smart_ant_type2_init_8822b()
548 reg44_ori = odm_get_mac_reg(dm, R_0x44, MASKDWORD); in phydm_update_beam_pattern_type2()
581 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
582 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
593 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
607 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
609 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
1411 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_hl_smart_ant_type1_init_8821a()
[all …]
H A Dphydm_regtable.h523 #define R_0x44 0x44 macro
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8188eu/hal/phydm/
H A Dphydm_smt_ant.c113 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_cumitek_smt_ant_init_8822b()
456 odm_set_mac_reg(dm, R_0x44, BIT(25) | BIT(24), 0); /*@config P_GPIO[3:2] to data port*/ in phydm_hl_smart_ant_type2_init_8822b()
457 odm_set_mac_reg(dm, R_0x44, BIT(17) | BIT(16), 0x3); /*@enable_output for P_GPIO[3:2]*/ in phydm_hl_smart_ant_type2_init_8822b()
549 reg44_ori = odm_get_mac_reg(dm, R_0x44, MASKDWORD); in phydm_update_beam_pattern_type2()
582 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
583 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
594 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
608 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
610 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
1412 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_hl_smart_ant_type1_init_8821a()
[all …]
H A Dphydm_regtable.h385 #define R_0x44 0x44 macro
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8821cs/hal/phydm/
H A Dphydm_smt_ant.c112 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_cumitek_smt_ant_init_8822b()
455 odm_set_mac_reg(dm, R_0x44, BIT(25) | BIT(24), 0); /*@config P_GPIO[3:2] to data port*/ in phydm_hl_smart_ant_type2_init_8822b()
456 odm_set_mac_reg(dm, R_0x44, BIT(17) | BIT(16), 0x3); /*@enable_output for P_GPIO[3:2]*/ in phydm_hl_smart_ant_type2_init_8822b()
548 reg44_ori = odm_get_mac_reg(dm, R_0x44, MASKDWORD); in phydm_update_beam_pattern_type2()
581 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
582 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
593 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
607 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
609 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
1411 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_hl_smart_ant_type1_init_8821a()
[all …]
H A Dphydm_regtable.h539 #define R_0x44 0x44 macro
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8189fs/hal/phydm/
H A Dphydm_smt_ant.c112 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_cumitek_smt_ant_init_8822b()
455 odm_set_mac_reg(dm, R_0x44, BIT(25) | BIT(24), 0); /*@config P_GPIO[3:2] to data port*/ in phydm_hl_smart_ant_type2_init_8822b()
456 odm_set_mac_reg(dm, R_0x44, BIT(17) | BIT(16), 0x3); /*@enable_output for P_GPIO[3:2]*/ in phydm_hl_smart_ant_type2_init_8822b()
548 reg44_ori = odm_get_mac_reg(dm, R_0x44, MASKDWORD); in phydm_update_beam_pattern_type2()
581 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
582 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
593 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
607 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
609 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
1411 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_hl_smart_ant_type1_init_8821a()
[all …]
H A Dphydm_regtable.h438 #define R_0x44 0x44 macro
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8189fs/hal/phydm/
H A Dphydm_smt_ant.c113 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_cumitek_smt_ant_init_8822b()
456 odm_set_mac_reg(dm, R_0x44, BIT(25) | BIT(24), 0); /*@config P_GPIO[3:2] to data port*/ in phydm_hl_smart_ant_type2_init_8822b()
457 odm_set_mac_reg(dm, R_0x44, BIT(17) | BIT(16), 0x3); /*@enable_output for P_GPIO[3:2]*/ in phydm_hl_smart_ant_type2_init_8822b()
549 reg44_ori = odm_get_mac_reg(dm, R_0x44, MASKDWORD); in phydm_update_beam_pattern_type2()
582 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
583 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
594 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
608 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
610 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
1412 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_hl_smart_ant_type1_init_8821a()
[all …]
H A Dphydm_regtable.h385 #define R_0x44 0x44 macro
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8188fu/hal/phydm/
H A Dphydm_smt_ant.c112 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_cumitek_smt_ant_init_8822b()
455 odm_set_mac_reg(dm, R_0x44, BIT(25) | BIT(24), 0); /*@config P_GPIO[3:2] to data port*/ in phydm_hl_smart_ant_type2_init_8822b()
456 odm_set_mac_reg(dm, R_0x44, BIT(17) | BIT(16), 0x3); /*@enable_output for P_GPIO[3:2]*/ in phydm_hl_smart_ant_type2_init_8822b()
548 reg44_ori = odm_get_mac_reg(dm, R_0x44, MASKDWORD); in phydm_update_beam_pattern_type2()
581 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
582 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
593 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
607 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
609 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
1411 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_hl_smart_ant_type1_init_8821a()
[all …]
H A Dphydm_regtable.h438 #define R_0x44 0x44 macro
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8723ds/hal/phydm/
H A Dphydm_smt_ant.c112 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_cumitek_smt_ant_init_8822b()
455 odm_set_mac_reg(dm, R_0x44, BIT(25) | BIT(24), 0); /*@config P_GPIO[3:2] to data port*/ in phydm_hl_smart_ant_type2_init_8822b()
456 odm_set_mac_reg(dm, R_0x44, BIT(17) | BIT(16), 0x3); /*@enable_output for P_GPIO[3:2]*/ in phydm_hl_smart_ant_type2_init_8822b()
548 reg44_ori = odm_get_mac_reg(dm, R_0x44, MASKDWORD); in phydm_update_beam_pattern_type2()
581 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
582 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
593 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
607 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); in phydm_update_beam_pattern_type2()
609 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); in phydm_update_beam_pattern_type2()
1411 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); in phydm_hl_smart_ant_type1_init_8821a()
[all …]
H A Dphydm_regtable.h536 #define R_0x44 0x44 macro

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