1 /* 2 *rk_aiq_types_alsc_hw.h 3 * 4 * Copyright (c) 2019 Rockchip Corporation 5 * 6 * Licensed under the Apache License, Version 2.0 (the "License"); 7 * you may not use this file except in compliance with the License. 8 * You may obtain a copy of the License at 9 * 10 * http://www.apache.org/licenses/LICENSE-2.0 11 * 12 * Unless required by applicable law or agreed to in writing, software 13 * distributed under the License is distributed on an "AS IS" BASIS, 14 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 * See the License for the specific language governing permissions and 16 * limitations under the License. 17 * 18 */ 19 20 #ifndef _RK_AIQ_TYPE_AUVNR_HW_V1_H_ 21 #define _RK_AIQ_TYPE_AUVNR_HW_V1_H_ 22 #include "rk_aiq_comm.h" 23 24 typedef struct RK_UVNR_Fix_V1_s{ 25 unsigned char uvnr_en; 26 unsigned char uvnr_step1_en; 27 unsigned char uvnr_step2_en; 28 unsigned char nr_gain_en; 29 unsigned char uvnr_nobig_en; 30 unsigned char uvnr_big_en; 31 32 unsigned char uvnr_gain_1sigma; 33 unsigned char uvnr_gain_offset; 34 unsigned char uvnr_gain_uvgain[2]; 35 unsigned char uvnr_gain_t2gen; 36 unsigned char uvnr_gain_iso; 37 unsigned char uvnr_t1gen_m3alpha; 38 unsigned char uvnr_t1flt_mode; 39 unsigned short uvnr_t1flt_msigma; 40 unsigned char uvnr_t1flt_wtp; 41 unsigned char uvnr_t1flt_wtq[8]; 42 unsigned char uvnr_t2gen_m3alpha; 43 unsigned short uvnr_t2gen_msigma; 44 unsigned char uvnr_t2gen_wtp; 45 unsigned char uvnr_t2gen_wtq[4]; 46 unsigned short uvnr_t2flt_msigma; 47 48 unsigned char uvnr_t2flt_wtp; 49 unsigned char uvnr_t2flt_wt[3]; 50 51 }RK_UVNR_Fix_V1_t; 52 53 54 55 #endif 56 57 58 59