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Searched refs:REG_TRAINING_WL_CS_MASK (Results 1 – 3 of 3) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_hws_hw_training_def.h290 #define REG_TRAINING_WL_CS_MASK 0xfffffffc macro
/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_axp.h316 #define REG_TRAINING_WL_CS_MASK 0xFFFFFFFC macro
H A Dddr3_write_leveling.c1179 reg = (reg_read(REG_TRAINING_WL_ADDR) & REG_TRAINING_WL_CS_MASK) | cs; in ddr3_write_leveling_single_cs()