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Searched refs:REG_PHY_REGISTRY_FILE_ACCESS_OP_WR (Results 1 – 5 of 5) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_hw_training.c564 reg |= REG_PHY_REGISTRY_FILE_ACCESS_OP_WR; in ddr3_write_pup_reg()
585 reg |= REG_PHY_REGISTRY_FILE_ACCESS_OP_WR; in ddr3_write_pup_reg()
838 val |= REG_PHY_REGISTRY_FILE_ACCESS_OP_WR; in ddr3_read_training_results()
846 val |= REG_PHY_REGISTRY_FILE_ACCESS_OP_WR; in ddr3_read_training_results()
H A Dddr3_axp.h305 #define REG_PHY_REGISTRY_FILE_ACCESS_OP_WR 0xC0000000 macro
H A Dddr3_write_leveling.c1359 reg |= REG_PHY_REGISTRY_FILE_ACCESS_OP_WR; in ddr3_write_ctrl_pup_reg()
H A Dddr3_pbs.c1515 reg |= REG_PHY_REGISTRY_FILE_ACCESS_OP_WR; in ddr3_pbs_write_pup_dqs_reg()
/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_hws_hw_training_def.h279 #define REG_PHY_REGISTRY_FILE_ACCESS_OP_WR 0xc0000000 macro