Searched refs:REG_DSI_10nm_PHY_CMN_CLK_CFG0 (Results 1 – 2 of 2) sorted by relevance
544 cmn_clk_cfg0 = pll_read(phy_base + REG_DSI_10nm_PHY_CMN_CLK_CFG0); in dsi_pll_10nm_save_state()569 pll_write(phy_base + REG_DSI_10nm_PHY_CMN_CLK_CFG0, in dsi_pll_10nm_restore_state()713 REG_DSI_10nm_PHY_CMN_CLK_CFG0, in pll_10nm_register()786 REG_DSI_10nm_PHY_CMN_CLK_CFG0, in pll_10nm_register()
1727 #define REG_DSI_10nm_PHY_CMN_CLK_CFG0 0x00000010 macro