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Searched refs:REG_DRAM_PHY_CONFIG_ADDR (Results 1 – 5 of 5) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_dfs.c642 reg = reg_read(REG_DRAM_PHY_CONFIG_ADDR) & REG_DRAM_PHY_CONFIG_MASK; in ddr3_dfs_high_2_low()
645 dfs_reg_write(REG_DRAM_PHY_CONFIG_ADDR, reg); in ddr3_dfs_high_2_low()
647 reg = (reg_read(REG_DRAM_PHY_CONFIG_ADDR) | ~REG_DRAM_PHY_CONFIG_MASK); in ddr3_dfs_high_2_low()
650 dfs_reg_write(REG_DRAM_PHY_CONFIG_ADDR, reg); in ddr3_dfs_high_2_low()
1017 reg = reg_read(REG_DRAM_PHY_CONFIG_ADDR) & REG_DRAM_PHY_CONFIG_MASK; in ddr3_dfs_low_2_high()
1020 dfs_reg_write(REG_DRAM_PHY_CONFIG_ADDR, reg); in ddr3_dfs_low_2_high()
1023 reg = reg_read(REG_DRAM_PHY_CONFIG_ADDR) | ~REG_DRAM_PHY_CONFIG_MASK; in ddr3_dfs_low_2_high()
1026 dfs_reg_write(REG_DRAM_PHY_CONFIG_ADDR, reg); in ddr3_dfs_low_2_high()
1367 reg = (reg_read(REG_DRAM_PHY_CONFIG_ADDR) & REG_DRAM_PHY_CONFIG_MASK); in ddr3_dfs_low_2_high()
1370 dfs_reg_write(REG_DRAM_PHY_CONFIG_ADDR, reg); in ddr3_dfs_low_2_high()
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H A Dddr3_axp.h290 #define REG_DRAM_PHY_CONFIG_ADDR 0x15EC macro
H A Dddr3_init.c120 debug_print_reg(REG_DRAM_PHY_CONFIG_ADDR); in print_dunit_setup()
H A Dddr3_spd.c1185 reg_write(REG_DRAM_PHY_CONFIG_ADDR, reg);
/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_hws_hw_training_def.h264 #define REG_DRAM_PHY_CONFIG_ADDR 0x15ec macro