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Searched refs:REG_DDR3_MR2_CWL_OFFS (Results 1 – 5 of 5) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_dfs.c483 & ~(REG_DDR3_MR2_CWL_MASK << REG_DDR3_MR2_CWL_OFFS); in ddr3_dfs_high_2_low()
485 reg |= ((0x1) << REG_DDR3_MR2_CWL_OFFS); in ddr3_dfs_high_2_low()
1181 ~(REG_DDR3_MR2_CWL_MASK << REG_DDR3_MR2_CWL_OFFS); in ddr3_dfs_low_2_high()
1183 reg |= ((0) << REG_DDR3_MR2_CWL_OFFS); in ddr3_dfs_low_2_high()
1185 reg |= ((dram_info->cwl) << REG_DDR3_MR2_CWL_OFFS); in ddr3_dfs_low_2_high()
1497 reg |= dram_info->cwl << REG_DDR3_MR2_CWL_OFFS; in ddr3_dfs_low_2_high()
H A Dddr3_axp.h278 #define REG_DDR3_MR2_CWL_OFFS 3 macro
H A Dddr3_hw_training.c140 reg = reg_read(REG_DDR3_MR2_ADDR) >> REG_DDR3_MR2_CWL_OFFS; in ddr3_hw_training()
142 reg = reg_read(REG_DDR3_MR2_CS_ADDR) >> REG_DDR3_MR2_CWL_OFFS; in ddr3_hw_training()
H A Dddr3_spd.c1110 reg = ((cwl - 5) << REG_DDR3_MR2_CWL_OFFS);
/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_hws_hw_training_def.h252 #define REG_DDR3_MR2_CWL_OFFS 3 macro