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Searched refs:REG_CPU_PLL_CTRL_0_ADDR (Results 1 – 2 of 2) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_hws_hw_training_def.h349 #define REG_CPU_PLL_CTRL_0_ADDR 0x1871c macro
/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_axp.h365 #define REG_CPU_PLL_CTRL_0_ADDR 0x1871C macro