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Searched refs:PLL_BYPASS_MASK (Results 1 – 10 of 10) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/clk/imx/
H A Dclk-frac-pll.c26 #define PLL_BYPASS_MASK BIT(14) macro
57 if (readl_relaxed(pll->base) & (PLL_PD_MASK | PLL_BYPASS_MASK)) in clk_wait_ack()
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/
H A Dcpu.c188 reg = PLL_BYPASS_MASK | (divm << pllinfo->m_shift); in pllx_set_rate()
209 reg &= ~PLL_BYPASS_MASK; in pllx_set_rate()
H A Dclock.c623 base_reg |= PLL_BYPASS_MASK; in clock_set_rate()
637 base_reg &= ~PLL_BYPASS_MASK; in clock_set_rate()
/OK3568_Linux_fs/u-boot/arch/arm/mach-davinci/
H A Dlowlevel_init.S116 ldr r7, PLL_BYPASS_MASK
390 ldr r7, PLL_BYPASS_MASK
649 PLL_BYPASS_MASK: label
/OK3568_Linux_fs/kernel/drivers/clk/rockchip/regmap/
H A Dclk-regmap-pll.c20 #define PLL_BYPASS_MASK BIT(15) macro
77 bypass = (con0 & PLL_BYPASS_MASK) >> PLL_BYPASS_SHIFT; in clk_regmap_pll_recalc_rate()
/OK3568_Linux_fs/kernel/drivers/misc/rk628/
H A Drk628_cru.h16 #define PLL_BYPASS_MASK BIT(15) macro
H A Drk628_cru.c89 bypass = (con0 & PLL_BYPASS_MASK) >> PLL_BYPASS_SHIFT; in rk628_cru_clk_get_rate_pll()
/OK3568_Linux_fs/kernel/drivers/media/i2c/rk628/
H A Drk628_cru.h16 #define PLL_BYPASS_MASK BIT(15) macro
H A Drk628_cru.c90 bypass = (con0 & PLL_BYPASS_MASK) >> PLL_BYPASS_SHIFT; in rk628_cru_clk_get_rate_pll()
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-tegra/
H A Dclk_rst.h242 #define PLL_BYPASS_MASK (1U << PLL_BYPASS_SHIFT) macro